Lexmark International Inc. v. Universal Imaging Industries, LLC

UNITED STATES DISTRICT COURT

MIDDLE DISTRICT OF FLORIDA

TAMPA DIVISION

LEXMARK INTERNATIONAL

INC.,

Plaintiff,

v. Case No. 8:18-cv-1047-WFJ-AEP

UNIVERSAL IMAGING

INDUSTRIES, LLC,

Defendant.

_________________________________/

ORDER

Before the Court are Plaintiff Lexmark International Inc. (“Lexmark”) and

Defendant Universal Imaging Industries, LLC’s (“UII”) motions for summary

judgment (Dkts. 242/S-247 & 239/S-244). Both parties have provided responses

(Dkts. 260/S-262 & 253/S-256) and replies (Dkts. 271/S-272 & 269). On September

19, 2023, the Court held a hearing on these matters (Dkt. S-280). With the benefit of

full briefing, the Court grants-in-part and denies-in-part both motions.

BACKGROUND

Lexmark develops and sells toner cartridges that utilize patented microchip

technology for printer-to-cartridge authentication purposes. UII develops and sells

devices that allow third parties to make aftermarket toner cartridges which work with

Lexmark printers. Lexmark maintains that UII’s devices infringe its patents.

I. Factual Background

Lexmark’s business strategy focuses on building an installed base of printers

that will generate demand for Lexmark’s toner cartridges and services. Dkt. 36 at 3.

To protect this demand, Lexmark developed microchip technology that allows

authorized toner cartridges and Lexmark printers to record information and

communicate with one another in novel ways. Id. at 6. The implementation of this

technology is supposed to prevent unauthorized toner cartridges from being used in

Lexmark printers while also improving the general processing capabilities of

Lexmark products. Id.

Lexmark owns a number of patents that cover key features of its microchip

technology. Eight are at issue here: U.S. Patent Nos. 9,839,136 (“the ‘136 Patent”);

9,400,764 (“the ‘764 Patent”); 7,844,786 (“the ‘786 Patent”); 8,966,193 (“the ‘193

Patent”); 8,225,021 (“the ‘021 Patent”); 8,386,657 (“the ‘657 Patent”); 8,850,079

(“the ‘079 Patent”); and 9,176,921 (“the ‘921 Patent).1 The parties agree that these

patents fit into four categories: the “Voltage Clamping Patents” (the ‘136 and ‘764

Patents); the “Punch Out Bit Patents” (the ‘786 and ‘193 Patents); the “First Family

of Address Change Patents” (the ‘021 and ‘657 Patents); and the “Second Family of

Address Change Patents” (the ‘079 and ‘921 Patents).

1 Lexmark’s asserted patents can be found at Dkts. 36-3 (the ‘021 Patent), 36-4 (the ‘657 Patent),

36-5 (the ‘079 Patent), 36-6 (the ‘921 Patent), 36-8 (the ‘786 Patent), 36-9 (the ‘193 Patent), 36-

11 (the ‘764 Patent), and 36-12 (the ‘136 Patent).

The Voltage Clamping Patents describe memory modules, electrical

interfaces, addressing schemes, and command protocols that facilitate

communication between computing devices and memory modules. See generally

Dkts. 36-11 & 36-12. These patents seek to overcome issues with both the untimely

updating of non-volatile memory modules and their general use-based degradation.

Dkt. 36-11 at 15; Dkt. 36-12 at 18. They teach that these issues can be diminished

by utilizing an intermediate signal wire voltage that allows a controlling computer

system to continue sending data and clock signals to subject memory modules while

also tracking individual memory modules. Dkt. 36-11 at 15–16; Dkt. 36-12 at 18–

19; see Dkt. S-247-6 at 16–18.

The Punch Out Bit Patents describe electrical interfaces, addressing schemes,

and command protocols that allow for single signal communications with multiple

memory modules in computing devices. See generally Dkts. 36-8 & 36-9. These

patents largely seek to overcome the same issues that the Voltage Clamping Patents

are directed towards. Dkt. 36-8 at 13; Dkt. 36-9 at 15. They teach that these issues

can be further diminished by utilizing command protocols to send “punch out”

commands concerning specified bits in one or more non-volatile memory modules.

Dkt. 36-8 at 13–14; Dkt. 36-9 at 15–16. These commands effectively enable each

subject memory module to change a particular bit field in order to record/signify

data such as toner cartridge depletion. Id.

The First Family of Address Change Patents describe master/slave

communication systems in which a master device communicates with a slave device

by uniquely addressing each of the slave devices for security-authentication

purposes. See generally Dkts. 36-3 & 36-4. These patents seek to provide more

security in bus systems shared by master and slave devices (such as printers and

toner cartridges) by periodically changing a slave device’s unique address through

master command without having the slave device communicate its new address back

to the master. Dkt. 36-3 at 11; Dkt. 36-4 at 11. They teach that these goals can be

achieved through a pseudorandom address-changing method in which, by master

command, a slave changes its address according to a secret algorithm. Dkt. 36-3 at

11–12; Dkt. 36-4 at 11–12. Knowing the algorithm itself, the master can then

generate the same changed address without the slave translating it back across the

shared communication bus. Id. This purportedly prevents imposter slave devices

from intercepting or detecting an authentic slave device’s new address.

The Second Family of Address Change Patents describe methods of setting a

slave device’s address that include determining a characterization value associated

with a consumable, calculating number of address change operations based upon the

characterization value, and setting a last address generated from the number of

address change operations as the new address of the slave device, wherein the

characterization value is determined based upon a usage of the consumable. See

generally Dkt. 36-5 & 36-6. In other words, these patents describe a more variable

and dynamic address-changing method that is meant to alleviate vulnerabilities

inherent in the security techniques disclosed by the First Family of Address Change

Patents (i.e., the possibility of an imposter device that can mimic basic

pseudorandom address-changing sequences). Dkt. 36-5 at 10; Dkt. 36-6 at 9. The

Second Family of Address Change patents teach that these vulnerabilities can be

diminished by a command protocol in which a master device transmits a number of

address-change requests, and a slave device undertakes the same number of address-

change operations. Dkt. 36-5 at 10–11; Dkt. 36-6 at 9–10. Once the slave

acknowledges completion of all requested operations, the final address generated by

the slave is set as its new address. Id. This is supposed to make it more difficult for

a person to produce imposter devices that can predict correct addresses.

Notwithstanding the aforementioned authentication technology—which

Lexmark claims to have implemented in its products—UII has created devices that

allow unauthorized toner cartridges to work in Lexmark printers. These devices are

(or were) sold by UII2 to third party cartridge remanufacturers and include UII’s

E260 Family, T650 Family, and Color Printer Devices, (collectively, “the UII

Pensive Devices”) as well as UII’s MS/MX 310 Family, MS/MX 710/810 Family,

and BSD M/XM Family (collectively, “the UII Arwen Devices”). Dkt. 36 at 10–11.

2 See generally Dkt. 36-14 (screenshots from www.uiiindustries.com taken on April 5, 2018).

Each UII device generally utilizes two integrated circuit chips to achieve

communication and processing goals similar to those discussed above. Id. They

nevertheless correspond to different Lexmark products3 and vary in functionality by

group (i.e., UII Pensive Devices versus UII Arwen Devices).

Lexmark claims that UII was able to produce these devices only by

disassembling and reverse engineering the microchips in Lexmark’s toner cartridges.

Id. at 17–19. Lexmark seeks to prove that, in so doing, UII created devices that

infringe multiple claims contained within the patents asserted above.

II. Procedural Background

On April 30, 2018, Lexmark brought the instant patent infringement suit

against UII. Dkt. 1. After multiple years of motion practice, the following issues

remain: (I) whether the UII Pensive Devices infringe claims 1 and 9 of the ‘136

Patent; (II) whether the UII Pensive Devices infringe claims 15 and 24 of the ‘764

Patent; (III) whether the UII Pensive Devices infringe claims 2 and 6 of the ‘786

Patent; (IV) whether the UII Pensive Devices infringe claims 10 and 33 of the ‘193

Patent; (V) whether the UII Arwen Devices infringe claims 1 and 3 of the ‘021

3 According to Lexmark, and UII’s website, UII’s devices correspond to Lexmark’s products in

the following way: the E260 Family corresponds to Lexmark’s E26cx/36x/46x Family; the T650

Family corresponds to Lexmark’s T65x Family; the Color Printer Devices correspond to

Lexmark’s C54x Family; the MS/MX 310 Family corresponds to Lexmark’s MS31x/41x/51x/61x

Family; the MS/MX 710/810 Family corresponds to Lexmark’s MS71x/81x Family; and the BSD

M/XM Family corresponds to certain models in Lexmark’s MS31x/41x/61x and MS71x/81x

Families. Dkt. 36 at 11; Dkt. 36-14 at 4–5.

Patent; (VI) whether the UII Arwen Devices infringe claims 2 and 9 of the ‘657

Patent; (VII) whether the UII Arwen Devices infringe claims 7 and 14 of the ‘079

Patent; (VIII) whether the UII Arwen Devices infringe claims 1 and 15 of the ‘921

Patent; (IX) whether Lexmark’s products practice at least one claim of each of the

asserted patents; and (X) whether any claims at issue in the asserted patents are

invalid.

On August 7, 2023, the parties submitted opposing motions for summary

judgment. Dkts. 239/S-244 & 242/S-247. Lexmark requests: (I) a finding of validity

as to all asserted claims of the Voltage Clamping Patents; (II) a finding of validity

as to claim 33 of the ‘193 Patent; (III) a finding of infringement concerning the UII

Arwen Devices’ alleged infringement of claim 1 of the ‘021 Patent and claim 7 of

the ‘079 Patent; (IV) a finding of infringement concerning the UII Pensive Devices’

alleged infringement of claim 15 of the ‘764 Patent; and (V) a finding that Lexmark’s

products practice at least one claim of each of the patents at issue. See generally Dkt.

S-247. UII requests: (I) a finding of non-infringement as to each asserted patent; (II)

a finding of invalidity as to the Punch Out Bit Patents; (III) a finding that Lexmark

has failed to establish lost profits damages; and (IV) a finding precluding Lexmark

from recovering any pre-suit damages. See generally Dkt. S-244. The Court now

turns to address these issues.

LEGAL STANDARD

Under Federal Rule of Civil Procedure 56, “[t]he court shall grant summary

judgment if the movant shows that there is no genuine dispute as to any material fact

and the movant is entitled to judgment as a matter of law.” Fed. R. Civ. P. 56(a); see

also Mize v. Jefferson City Bd. of Educ., 93 F.3d 739, 742 (11th Cir. 1996). An issue

of fact is “genuine” only if “a reasonable jury could return a verdict for the

nonmoving party.” Anderson v. Liberty Lobby, Inc., 477 U.S. 242, 248 (1986). A

fact is “material” if the fact could affect the outcome of the lawsuit under the

governing law. Id.

The moving party bears the initial burden of identifying those portions of the

record demonstrating the lack of a genuinely disputed issue of material fact. Celotex

Corp. v. Catrett, 477 U.S. 317, 323 (1986). If met, the burden shifts to the non-

moving party to “come forward with specific facts showing that there is a genuine

issue for trial.” Shaw v. City of Selma, 884 F.3d 1093, 1098 (11th Cir. 2018) (citation

omitted). To satisfy its burden, the non-moving party “must do more than simply

show that there is some metaphysical doubt as to the material facts.” Matsushita

Elec. Indus. Co. v. Zenith Radio Corp., 475 U.S. 574, 586 (1986). The non-moving

party must go beyond the pleadings and “identify affirmative evidence” that creates

a genuine factual dispute. Crawford-El v. Britton, 523 U.S. 574, 600 (1998).

In determining whether a genuine dispute of material fact exists, the Court

must view the evidence and draw all factual inferences therefrom in a light most

favorable to the non-moving party. Skop v. City of Atlanta, 485 F.3d 1130, 1136

(11th Cir. 2007). In addition, the Court must resolve any reasonable doubts in the

non-moving party’s favor. Id. Summary judgment should only be granted “[w]here

the record taken as a whole could not lead a rational trier of fact to find for the non-

moving party[.]” Matsushita, 475 U.S. at 587.

DISCUSSION

The instant dispute revolves around invalidity, infringement, damages, and

whether Lexmark’s products practice at least one claim of each of the patents

asserted above. The Court will address each below.

I. Non-Invalidity

Patents are presumed valid under 35 U.S.C. § 282. To overcome this

presumption on summary judgment, UII must establish invalidity by clear and

convincing evidence. See Norian Corp. v. Stryker Corp., 363 F.3d 1321, 1326 (Fed.

Cir. 2004). To retain this presumption, Lexmark need only demonstrate that UII

failed to meet its evidentiary burden of establishing invalidity. See Eli Lilly & Co. v.

Barr Lab'ys, Inc., 251 F.3d 955, 962 (Fed. Cir. 2001) (finding that “a moving party

seeking to have a patent held not invalid at summary judgment must show that the

nonmoving party . . . failed to produce clear and convincing evidence on an essential

element of a defense upon which a reasonable jury could invalidate the patent”).

Here, Lexmark has adequately demonstrated that UII failed to present clear

and convincing evidence concerning the invalidity of Claims 15 and 24 of the ‘764

Patent, Claims 1 and 9 of the ‘136 Patent, and Claim 33 of the ‘193 Patent. Indeed,

beyond the fact that “UII chose not to contest the validity of these specific claims”

on summary judgment, Dkt. S-256 at 13, UII’s technical expert, Joseph

McAlexander, admitted that he has no invalidity opinions about them:

Lexmark’s counsel: Okay, Mr. McAlexander, I reviewed your

invalidity reports. And there are two patents that we’ve been discussing

at length here regarding voltage clamping and voltage limiting [the ‘764

and ‘136 Patents (the Voltage Clamping Patents)]. And also Claim 33

of the ‘193 Patent which includes a voltage limiting limitation. I did not

see any invalidity arguments that you presented for any of those -- those

claims. Do you have any invalidity arguments with respect to Claim 33

of the ‘193 Patent or the other two voltage clamping patents?

Mr. McAlexander: The -- of the eight patents, my invalidity positions

are addressing six of those -- or eight of those -- excuse me -- six of

those patents. I did not present any addition -- any invalidity positions

for the other two. That answers the first part of your question. And with

regard to Claim 33 on the ‘193, I believe I did not offer any invalidity

position on that as well.

Dkt. 247-5 at 23–24. Summary judgment of non-invalidity is therefore appropriate

as to these claims.4 See Biotec Biologische Naturverpackungen GmbH & Co. KG v.

4 There appears to be some dispute concerning Lexmark’s entitlement to summary judgment on

this issue due to UII’s decision not to affirmatively challenge validity at the summary judgment

stage. See Dkt. S-256 at 13; Dkt. S-272 at 12. The Court notes that UII challenged the validity of

Biocorp, Inc., 249 F.3d 1341, 1352–55 (Fed. Cir. 2001) (upholding summary

judgment finding of non-invalidity where the moving party “presented deposition

testimony of the defendants’ primary witness wherein they admitted knowing no

facts that implied the invalidity of the patents”).

II. Invalidity

UII challenges the validity of: (1) Claims 2 and 6 of the ‘786 Patent, and (2)

Claim 10 of the ‘193 Patent. Specifically, UII maintains that prior art both anticipates

and renders obvious each of these claims. Dkt. S-244 at 19–45.

“The first step in any invalidity analysis is claim construction[.]” SIBIA

Neurosciences, Inc. v. Cadus Pharm. Corp., 225 F.3d 1349, 1355 (Fed. Cir. 2000)

(citation omitted). “Claim scope or construction is a question of law and the

existence of a dispute as to that legal issue does not preclude summary judgment.”

Tillotson, Ltd. v. Walbro Corp., 831 F.2d 1033, 1037 (Fed. Cir. 1987) (citation

omitted). If “a claim is in dispute, however, it is necessary to look at certain extrinsic

evidence, including the specification, the prosecution history, and other claims.” Id.

Where that extrinsic evidence includes “expert testimony needed to explain a

disputed term . . . an underlying factual question may arise which makes summary

the ‘764, ‘136, and ‘193 Patents in its affirmative defenses. Dkt. 67 at 61–62. This makes non-

invalidity an appropriate subject of summary judgment. See Fed. R. Civ. P. 56(a) (“A party may

move for summary judgment, identifying each claim or defense—or the part of each claim or

defense—on which summary judgment is sought.”).

judgment improper.” Howes v. Med. Components, Inc., 814 F.2d 638, 643 (Fed. Cir.

1987) (cleaned up) (citation omitted).

The Punch Out Bit Field Patent claims challenged by UII read as follows:

1. A method of updating memory modules, comprising: receiving, at

one or more memory modules, a command transmitted from a

processing device, wherein the command comprises a) an increment

counter command operable to instruct the one or more memory

modules to increment a counter within the one or more memory

modules and b) a punch out bit field command operable to instruct the

one or more memory modules to punch out a specified bit field within

the one or more memory modules; and processing the command at the

one or more memory modules [Claim 1, ‘786].

2. The method of claim 1, wherein processing the command comprises

incrementing, in each of the one or more memory modules, at least one

counter [Claim 2 of ‘786].

6. The method of claim 1, wherein receiving further comprises

receiving, at the one or more memory modules, the command from the

processing device transmitted to the one or more memory modules via

an asynchronous data channel [Claim 6, ‘786].

*****

10. A memory module, comprising: a plurality of memory bits, wherein

the memory module receives at least one command indicative of usage

of toner or ink in a consumable item for an imaging device and instructs

the memory module to punch out at least one bit in at least one specified

bit field within the memory module indicative of the usage of toner or

ink, and processes the at least one command [Claim 10, ‘193].

Dkt. 36-8 at 20 (the ‘786 Patent); Dkt. 36-9 at 23 (the ‘193 Patent).

Thus far, the Court has construed the following limitations in the following

ways:

Claim Term Claim Term Construction

“processing the command at the one or “executing instructions to perform the

more memory modules” command described in this claim at the

one or more memory modules”

“punch out bit field command” “command to change at least one bit, in

a specific bit field in the one or more

non-volatile memory modules”

“punch out a specified bit field” “changing a specified bit or specified

group of bits in a non-volatile memory

module”

“punch out at least one bit” “change at least one bit, in the non-

volatile memory module”

Dkt. 117 at 10, 23. The Court will address additional claim construction issues, such

as scope, in the specific contexts of anticipation and obviousness.

i. Anticipation

35 U.S.C. § 102 provides that a claim is anticipated only “‘if each and every

limitation is found either expressly or inherently in a single prior art reference.’”

IPXL Holdings, L.L.C. v. Amazon.com, Inc., 430 F.3d 1377, 1380 (Fed. Cir. 2005)

(citation omitted). Ultimately, this is a question of fact. Id. (citation omitted).

Summary judgment is therefore inappropriate unless no reasonable jury applying the

clear and convincing evidence standard could find that prior art fails to anticipate all

of the subject claim’s limitations. Telemac Cellular Corp. v. Topp Telecom, Inc.,

247 F.3d 1316, 1327 (Fed. Cir. 2001).

UII argues that three sources of prior art anticipate the subject claims: (1)

certain Inter Solution Ventures, Ltd. coding (“the ISV Code”); (2) certain Static

Control Components, Inc. coding (“the SCC Code”); and (3) U.S. Patent No. 6,984,

012 (“Asauchi”). Dkt. S-244 at 19–34. As a preliminary matter, Lexmark responds

that the ISV Code cannot qualify as prior art. The Court disagrees.

For patents having a filing date prior to March 16, 2013, prior art can include

disclosures of the claimed invention in patents or publications anywhere in the

world, as well as public use or sale of the claimed invention the United States—as

long as the disclosure, sale, or use occurred more than one year before the subject

patent application was domestically filed. See U.S. Water Servs., Inc. v. Novozymes

A/S, 843 F.3d 1345, 1350 n.5 (Fed. Cir. 2016); 35 U.S.C. § 102(b). To prevail on the

“on-sale bar[,]” a party must show that the invention in question “was both (1) the

subject of a commercial offer for sale and (2) ready for patenting.” Sunoco Partners

Mktg. & Terminals L.P. v. U.S. Venture, Inc., 32 F.4th 1161, 1168 (Fed. Cir. 2022)

(citations and internal quotations omitted). “Application of the on-sale bar . . . is

ultimately a question of law.” Id. at 1169 (citations and internal quotations omitted).

Given this, there is no question that the ISV Code qualifies as prior art. The

‘786 Patent claims priority back to June 16, 2005, Dkt. 36-8 at 2, and the ‘193 Patent

claims priority back to April 19, 2006, Dkt. 36-9 at 2. Accordingly, the earliest

critical date for either patent is June 16, 2004. UII has presented unrebutted evidence

that the ISV Code was included in ISV chips that were advertised and sold prior to

this date. Dkt. 241-9 at 4–14. Whether the purchaser was ignorant of the ISV chips’

internal coding is irrelevant for determining whether this qualified as a sale of the

invention itself. See Abbott Lab'ys v. Geneva Pharms., Inc., 182 F.3d 1315, 1318

(Fed. Cir. 1999) (agreeing with defendants that “it is irrelevant that the parties to the

sales did not know [the precise subject matter with which they were dealing]”).

Lexmark, moreover, cannot plausibly contest that the ISV Code was ready for

patenting at this time. It was reduced to practice prior to sale. See Pfaff v. Wells

Elecs., Inc., 525 U.S. 55, 61 (1998) (“It is well settled than an invention may be

patented [even] before it is reduced to practice.”).

Anticipating these issues, Lexmark argues that the on-sale provision of section

102(b) precludes only patentees from commercializing their own inventions prior to

patenting them. Dkt. S-262 at 17. This, however, is a misunderstanding of Federal

Circuit caselaw. Although preventing patentees from unduly extending their

monopoly over a later patented subject-matter is a strong policy behind the on-sale

bar, it is not section 102(b)’s only goal. What is more, the Federal Circuit has made

clear that “the statutory on-sale bar is not subject to exceptions for sales made by

third parties.” Abbott, 182 F.3d at 1318 (citation omitted). The fact that ISV sales

“were not made by [Lexmark] is therefore irrelevant.” Id. The ISV Code is prior art

that UII can rely on for invalidity purposes.

Notwithstanding, the Court finds that a material issue of fact precludes

summary judgment regarding the ultimate issue of anticipation. On one hand, Mr.

McAlexander presents extensive opinions regarding why the ISV Code, the SCC

Code, and Asauchi each disclose all of the limitations of Claims 2 and 6 of the ‘786

Patent or Claim 10 of the ‘193 Patent. Dkt. 241-10 at 351–67, 415–25, 437–50, 481–

86. On the other hand, Lexmark’s technical expert, Dr. Martin Walker, presents

similarly extensive rebuttal opinions to the contrary. S-Dkt. 262-10 at 114–21, 127–

32, 143–45. A reasonable jury could find for either party based on these reports and

the material facts contested therein. It follows that a “classic ‘battle of the experts’”

exists “which renders summary judgment improper.” Edwards Sys. Tech., Inc. v.

Digital Control Sys., Inc., 99 F. App'x 911, 921 (Fed. Cir. 2004); see also Crown

Packaging Tech., Inc. v. Ball Metal Beverage Container Corp., 635 F.3d 1373, 1384

(Fed. Cir. 2011) (finding that, “[w]here there is a material dispute as to the credibility

and weight that should be afforded to conflicting expert reports, summary judgment

is usually inappropriate”); TriMed, Inc. v. Stryker Corp., 608 F.3d 1333, 1343 (Fed.

Cir. 2010) (reversing summary judgment where genuine issues of material fact

surrounded anticipation). UII may present their anticipation case at trial. It is up to

the jury to weigh materially disputed expert testimony on this subject, not the Court.

See Med. Instrumentation & Diagnostics Corp. v. Elekta AB, 344 F.3d 1205, 1220

(Fed. Cir. 2003) (“The question of what a reference teaches and whether it describes

every element of a claim is a question for the finder of fact.”).

ii. Obviousness

35 U.S.C. § 103 provides that a claim is invalid due to obviousness where:

the differences between the claimed invention and the prior art are such

that the claimed invention as a whole would have been obvious before

the effective filing date of the claimed invention to a person having

ordinary skill in the art to which the claimed invention pertains.

“Whether the claimed subject matter would have been obvious to an ordinarily

skilled artisan at the time of the invention ‘is a question of law based on underlying

questions of fact.’” Plantronics, Inc. v. Aliph, Inc., 724 F.3d 1343, 1353 (Fed. Cir.

2013) (citation omitted). These facts include: “(1) the scope and content of the prior

art; (2) differences between the prior art and the claims at issue; (3) the level of

ordinary skill in the pertinent art; and (4) relevant objective considerations, including

commercial success, long felt but unsolved needs, and failure of others[.]” Id.

(internal quotations and citations omitted) (cleaned up). Obviousness must be proved

by clear and convincing evidence. See Procter & Gamble Co. v. Teva Pharms. USA,

Inc., 566 F.3d 989, 993–94 (Fed. Cir. 2009).

Unlike anticipation, “[o]bviousness can be proven by combining existing

prior art references[.]” Cohesive Techs., Inc. v. Waters Corp., 543 F.3d 1351, 1364

(Fed. Cir. 2008). This means that it will sometimes “be necessary for a court to look

to interrelated teachings of multiple patents; the effects of demands known to [the

relevant field]; and the background knowledge possessed by a person having

ordinary skill in the art, all in order to determine whether there was an apparent

reason to combine” known prior art elements in the way claimed by the subject

patent. KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 418 (2007). “The combination

of familiar elements according to known methods is likely to be obvious when it

does no more than yield predictable results.” Id. at 416.

Here, UII argues that the combination of U.S. Patent No. 5,995,744

(“Applegate”) and the Dallas Semiconductor DS1982 Specification Sheet

(“DS1982”) render the ‘786 and ‘193 Patents obvious. Dkt. S-244 at 34–45.

Lexmark responds that underlying issues of material fact preclude summary

judgment on these issues. Dkt. S-262 at 19–21.

The Court begins its analysis by noting that Applegate and DS1982 qualify as

prior art that a skilled artisan would have had reason to combine. Applegate, a

“method and apparatus for storing data in a non-volatile memory circuit mounted on

a printer’s process cartridge,” was issued on November 30, 1999. Dkt. 241-5 at 2.

DS1982, a “secure microchip” specification sheet, is published in Appendix A of

U.S. Patent No. 5,760,385 (“Curry”), which was itself issued on June 2, 1998. Dkt.

241-6 at 2, 12–33. These prior art references consequently predate the earliest critical

date for the subject patents by years. See Dkt. 36-8 at 2; Dkt. 36-9 at 2. Further,

Applegate expressly references DS1982 on multiple occasions and states that its

preferred EPROM “comprises a [DS1982 integrated circuit memory device].” Dkt.

241-5 at 21. Such a reference provides express motivation to combine Applegate and

DS1982. See Bayer Healthcare Pharms., Inc. v. Watson Pharms., Inc., 713 F.3d

1369, 1374–75 (Fed. Cir. 2013) (finding motivation to combine two pieces of prior

art where one expressly referenced the other).

With this much established, a comparison of Applegate/DS1982 and the

Punch Out Bit Field Patents is appropriate.

a. The ‘786 Patent and Applegate/DS1982

Both Claim 1 of the ‘786 Patent and Applegate/DS1982 disclose a method of

updating non-volatile memory modules. Dkt. 36-8 at 20; Dkt. 241-5 at 30; Dkt. 241-

10 at 368–375. The first issue to consider is whether, like Claim 1,

Applegate/DS1982 disclose a method that involves “receiving, at one or more

memory modules, a command transmitted from a processing device wherein the

command comprises: a) an increment counter command operable to instruct the one

or more memory modules to increment a counter within the one or more memory

modules[.]” Dkt. 36-8 at 20. While the parties agree that DS1982 does disclose an

operation for updating a value in non-volatile memory, they disagree about whether

this operation specifically involves an increment counter command from a

processing device. Dkt. S-262-10 at 133. Dr. Walker posits, and UII does not

dispute, that “[t]here are multiple ways that a memory value can be updated, most

of which involve the processor writing an updated value to the memory module.” Id.

at 132. Dr. Walker consequently maintains that “[s]ending an updated value to the

memory module is different from sending an increment counter command” and there

is “no reason to infer that” DS1982 discloses an increment counter command where

Applegate/DS1982 are “silent about how the count is incremented[.]” /d. at 133

(emphasis in original).

The Court largely agrees with Dr. Walker. Mr. McAlexander’s strongest

source of evidence concerning Applegate/DS1982’s disclosure of an increment

counter command comes from the DS1982 demonstratives included below:

a

nm"

commas

051982 LOADS LSB 0

ae ————— ——_——————————

me CAL GEMEUTOR

20

See Dkt. 241-10 at 381–86. These demonstratives nevertheless fail to show how the

count is incremented, and they certainly show no specific increment counter

command from a processing device. More importantly, though, DS1982 itself

provides that DS1982 chips “will automatically increment [their] address counter to

select the next byte in the EPROM Status data field” when certain “bit position”

conditions are met. Dkt. 241-6 at 23. This reasonably suggests that DS1982

incrementation is not a product of specific increment counter commands transmitted

from processing devices interacting with DS1982 chips.

Mr. McAlexander attempts to close this gap by pointing to Applegate, but the

same issue arises. Consider the following Applegate background reference upon

which Mr. McAlexander relies:

A concept found in some conventional printer/copiers is the ability to

limit the service life of a process cartridge based on information being

stored in the process cartridge. An example of this is U.S. Pat. No.

5,276,461 (owned by Tokyo Electric) which discloses a laser printer

having a replaceable photosensitive cartridge and also having a non-

volatile memory mounted to a card base plate. The non-volatile

memory comprises an EEPROM integrated circuit, which has a new

count value incremented every time the printer produces a new printed

sheet of print media.

Dkt. 241-5 at 16. Once again, this does not suggest that any new count value is being

reached through a specific increment counter command sent from a processing

device that is then processed by the memory module. It is just as likely that one

skilled in the art would understand this to be a reference to a processor writing an

updated value to a memory module. The combination of Applegate and DS1982 fail

to clearly disclose a method of updating non-volatile memory modules that includes

increment counter commands.

The second disputed issue to consider is whether, like Claim 1,

Applegate/DS1982 disclose a method that involves a command comprising both a)

an increment counter command and “b) a punch out bit field command [(i.e., a

command to change at least one bit, in a specific bit field in the one or more non-

volatile memory modules)] operable to instruct the one or more memory modules to

punch out a specified bit field within the one or more memory modules[.]” Dkt. 36-

8 at 20. Based on the foregoing, it is clear that this is not the case. Applegate/DS1982

do not disclose an increment counter command—let alone a command frame that

includes both a specific increment counter command and a punch out bit field

command. Mr. McAlexander’s assertions to the contrary strike the court as ipse dixit.

Moreover, even if it were true that “each [DS1982] memory module [disclosed by

Applegate] includes at least a command to increment a counter and instruct the

memory module to punch out at least one bit[,]” Mr. McAlexander does not

adequately explain where Applegate/DS1982 disclose such a multi-pronged

command that comes from a processing device such as a printer. See Dkt. 241-10 at

376. The prior art cited by UII can be reasonably interpreted as disclosing a method

of updating non-volatile memory modules that is different from that disclosed by the

‘786 Patent. Material issues of fact exist.

That said, UII has failed to meet its burden of showing by clear and convincing

evidence that the ‘786 Patent was obvious. “Obviousness requires more than a mere

showing that the prior art includes separate references covering each separate

limitation in a claim under examination.” Unigene Lab'ys, Inc. v. Apotex, Inc., 655

F.3d 1352, 1360 (Fed. Cir. 2011) (citation omitted). It “requires the additional

showing that a person of ordinary skill at the time of the invention would have

selected and combined those prior art elements in the normal course of research and

development to yield the claimed invention.” Id. Here, UII has shown a motivation

to combine Applegate and DS1982, but it has not shown that this prior art covers the

limitations of the ‘786 Patent or that an artisan would have reached the novelties of

the ‘786 Patent through a normal course of research and development. The “primary

object of” Applegate, after all, is “to provide an image forming apparatus such as a

printer that is capable of irreversibly storing information on a memory device that is

attached to a process cartridge.” Dkt. 241-5 at 17. In such a device, “the EPROM

memory device [DS1982] acts as a ‘write once read often’ memory device, because

the EPROM cannot be erased by ultraviolet light, since the window through which

this normally occurs is permanently sealed[.]” Id. at 18. The ‘786 Patent discloses

no such apparatus and does not envision treating non-volatile memory devices in

this specific way. It therefore makes little sense to suppose, without more, that an

artisan on the path set forth by Applegate/DS1982 would ever arrive at the method

claimed by the ‘786 Patent. The Court denies UII summary judgment on this issue.

b. The ‘193 Patent and Applegate/DS1982

The parties’ obviousness dispute as to the ‘193 Patent revolves around Claim

10, an independent claim which, as noted above, discloses:

A memory module, comprising: a plurality of memory bits, wherein the

memory module receives at least one command indicative of usage of

toner or ink in a consumable item for an imaging device and instructs

the memory module to punch out at least one bit in at least one specified

bit field within the memory module indicative of the usage of toner or

ink, and processes the at least one command.

Dkt. 36-9 at 23. At this point, there is no question that Applegate/DS192 disclose a

non-volatile memory module that is comprised of a plurality of bits. Applegate

expressly discloses DS1982 as its preferred EPROM embodiment, and DS1982

chips provide at least 1024 bits of data memory. Dkt. 241-5 at 21; Dkt. 241-6 at 12.

Instead, the issue is whether this prior art discloses a memory module that also

“receives at least one command indicative of usage of toner or ink in a consumable

item for an imaging device and instructs the memory module to punch out at least

one bit in at least one specified bit field within the memory module indicative of the

usage of toner or ink.” Dkt. 36-9 at 23.

The Court finds that it does not. In the context of literal infringement, UII

relies on the notion that there is a material difference between (a) changing specific

bits in a non-volatile memory bit field in response to a command and (b) copying

and storing information (bytes), without any changes, from volatile memory into

non-volatile memory. Dkt. S-244 at 13. Because the subject limitation requires the

disclosed non-volatile memory module, through specific command, to “change at

least one bit, [in at least one specified bit field,] in the [disclosed] non-volatile

memory module,” see Dkt. 117 at 10, 23, the Court agrees that the former would

satisfy the subject limitation, while the latter would not. The later method is simply

too generalized. As Dr. Walker himself testified, it involves no reception of a

command to punch out a specific bit, in a specific bit field, in non-volatile memory.

See Dkt. S-246-3 at 152-53. The problem for UII, then, is that DS1982 only

discloses this later method. Indeed, its own demonstrative shows that, in response to

a Write Memory OFh command, “DS1982 COPIES SCRATCHPAD 6[(volatile

memory)] TO DATA EPROM [(non-volatile memory)]” before “DS1982

INCREMENTS ADDRESS COUNTER[.]”

| Eres. |

<=>

wot

25

Dkt. 241-6 at 20.

Of course, the Court recognizes that UII’s infringement construction is partly

a product of Dr. Walker’s alleged flip-flopping on the issue of whether the

distinction addressed above is material. But UII cannot have it both ways any more

than Dr. Walker can. See CommScope Techs. LLC v. Dali Wireless Inc., 10 F.4th

1289, 1299 (Fed. Cir. 2021) (finding that a party cannot simultaneously rely on

inconsistent claim requirements for invalidity and infringement). And, either way,

as will be further explained in the context of infringement, this is the scope-

construction most compatible with the common limitations found in other claims of

the Punch Out Bit Field Patents. Receiving a command to punch “out a specified bit

field” results in directly changing a specified bit or specified group of bits in a non-

volatile memory module. Applegate/DS1982 do not disclose a non-volatile memory

module that does anything more than copy and store entire bytes (the bits of which

are apparently unspecified by command) from volatile memory into an unspecified

bit field. This means that they do not cover the subject limitation.

The Court consequently finds that UII has failed to meet its burden of showing

by clear and convincing evidence that the ‘193 Patent was obvious. UII has not

clearly shown that Applegate/DS1982 covers the limitations of Claim 10. Nor has it

convincingly shown that an artisan would have reached the novelties of the ‘193

Patent through a normal course of research and development. See Unigene, 655 F.3d

at 1360. The memory module disclosed by the ‘193 Patent arguably takes a novel

step in processing highly specified commands indicative of usage of toner or ink in

a consumable item for printers that does not naturally follow from

Applegate/DS1982. UII is denied summary judgment on this issue.

III. Infringement

Like invalidity, a “determination as to infringement involves a two-step

analysis.” WMS Gaming, Inc. v. Int'l Game Tech., 184 F.3d 1339, 1346 (Fed. Cir.

1999). “First, the claims are construed, a question of law in which the scope of the

asserted claims is defined. Second, the claims, as construed, are compared to the

accused device. This is a question of fact.” Advanced Cardiovascular Sys., Inc. v.

Scimed Life Sys., Inc., 261 F.3d 1329, 1336 (Fed. Cir. 2001) (citation omitted). To

ultimately prove infringement, the patentee must show by a preponderance of the

evidence that the accused device meets each claim limitation either literally or under

the doctrine of equivalents. Id. Summary judgment is appropriate where “it is shown

that the infringement issue can be reasonably decided only in favor of the movant,

when all reasonable factual inferences are drawn in favor of the non-movant.” Voice

Techs. Grp., Inc. v. VMC Sys., Inc., 164 F.3d 605, 612 (Fed. Cir. 1999).

Here, both parties request summary judgment on various infringement issues.

Lexmark requests findings that: (1) the UII Arwen Devices literally infringe Claim

1 of the ‘021 Patent as well as Claim 7 of the ‘079 Patent, and (2) the UII Pensive

Devices literally infringe Claim 15 of the ‘764 Patent. Dkt. S-247 at 6–7. UII

requests findings that its devices do not infringe any of the claims asserted by

Lexmark. Dkt. S-244 at 7, 13, 15.

i. The Address Change Patents (‘021, ‘’657, ‘079, ‘921)

Because the parties largely agree on how the UII Arwen Devices operate,

literal infringement of the Address Change Patents turns on claim construction. See

Athletic Alternatives, Inc. v. Prince Mfg., Inc., 73 F.3d 1573, 1578 (Fed. Cir. 1996)

(finding that where “the parties do not dispute any relevant facts regarding the

accused product but disagree over which of two possible meanings [of a claim] is

the proper one, the question of literal infringement collapses to one of claim

construction”).

The Court begins by noting that at least one of the following limitations is

found within each asserted claim of the Address Change Patents:

Claim Term Claim Term Construction

“address generator” “software or electronic circuitry

implementing an algorithm to generate

address values by performing the

specified algorithm”

“address generator generating plural “software or electronic circuitry capable

addresses” of implementing an algorithm to

generate more than one address value by

performing the specified algorithm”

“dynamic address generator” “software or electronic circuitry capable

of implementing an algorithm that

generates a new component address”

“dynamic address generator generates a “software or electronic circuitry capable

new component address” of implementing an algorithm that

generates a new component address”

“pseudorandom address generator” not defined during claim construction

Dkt. 117 at 14, 18–19.5 It follows that, for the UII Arwen Devices to infringe the

Address Change Patents, they must, at the very least, contain an “address generator.”

See Advanced Cardiovascular Sys., Inc., 261 F.3d at 1336. The question is what

qualifies as “software or electronic circuity implementing an algorithm to generate

address values by performing the specified algorithm.”

Lexmark argues that software or electronic circuitry qualifies as such as long

as it takes multiple steps to provide an address. See Dkt. 247 at 31–32. Under this

view, providing an address by implementing a finite sequence of steps to retrieve a

value from a preprogramed table of address values would qualify as performing an

algorithm that generates address values. Id. UII, on the other hand, maintains that it

is not enough to merely provide a predetermined address through implementation of

a series of steps. Dkt. S-244 at 8–9. The steps must themselves generate the address

value that is ultimately provided. Id. In other words, UII argues that the subject

5 “[A]ddress generator” is found in Claim 1 of the ‘021 Patent. Dkt. 36-3 at 16. “[P]seudorandom

address generator” is found in Claim 3 of the ‘021 Patent through Claim 3’s dependence on Claim

2, which is itself dependent on Claim 1. Id. “[A]ddress generator” is also found in Claims 2 and 9

of the ‘657 Patent through their dependence on Claim 1. Dkt. 36-4 at 16. “[D]ynamic address

generator” is found in Claim 7 of the ‘079 Patent as well as Claim 14 through its dependence on

Claim 12. Dkt. 36-5 at 14. Finally, “dynamic address generator” is also found in Claims 1 and 15

of the ‘921 Patent. Dkt. 36-6 at 13.

algorithm within the software or electronic circuitry must do the address generating

work in order for said software or circuitry to qualify as an “address generator.” Id.

The Court agrees with UII. It is axiomatic that an address generator generates

addresses. And, contrary to Lexmark’s suggestions, “to generate” is not “to

provide.” To provide is “to supply or make available.” Provide, Merriam-Webster,

https://www.merriam-webster.com/dictionary/provide (last visited Oct. 11, 2023).

To generate is “to bring into existence: such as, to create by means of a defined

process.” Generate, Merriam-Webster, https://www.merriam-

webster.com/dictionary/generate (last visited Oct. 11, 2023). It is therefore clear that

the “software or electronic circuitry implementing an algorithm to generate address

values by performing the specified algorithm” must perform an algorithm that

actually brings address values into existence (in some form) in order to qualify as an

“address generator.” It must do the work of generation, not just providing. See

Markman v. Westview Instruments, Inc., 52 F.3d 967, 981 (Fed. Cir.

1995), aff'd, 517 U.S. 370 (1996) (finding that “[e]xtrinsic evidence is to be used for

the court’s understanding of the patent, not for the purpose of varying or

contradicting the terms of the claims”).

Lexmark offers a number of reasons to reject this approach. First, Lexmark

argues, it “wrongly excludes the preferred embodiments disclosed in the ‘021 Patent

where the address generator ‘provides’ a new address.” Dkt. S-272 at 7. While the

Court recognizes that it is “rarely, if ever, correct” to interpret a claim so as to

exclude preferred embodiments, Vitronics Corp. v. Conceptronic, Inc., 90 F.3d

1576, 1583 (Fed. Cir. 1996), that is not what is happening here. An address generator

can both generate and provide an address. The two are not mutually exclusive. For

instance, consider the following portions of the ‘021 Patent cited by Lexmark:

2:29-37: In one or more disclosed embodiments, each slave device

incorporates therein a pseudorandom address generator which can be

incremented in response to a change address command from the master

device. When an address change is requested by the master, the slave

receives the request and increments the pseudorandom address

generator to provide a new slave address. The master device, running

the same address change algorithm, also increments the address in the

algorithm and thus predicts the new slave address.

6:5-13: When the slave device, for example slave device 14a, receives

the command and the old slave address matches the address currently

provided by the dynamic address generator 32a, then the command is

processed by the I2C circuit 26a. When decoded, the address change

command causes the dynamic address generator 32a, to be

incremented, whereupon a new random address is generated and self-

assigned to the slave device 14a.

7:20-25: FIG. 4 illustrates an embodiment of a slave address generator

according to another embodiment of the invention. Here, the

pseudorandom address generator 50 described above provides the least

significant bits of the slave device address, and a fixed address circuit

62 provides a fixed address that is unique to each slave device 14.

8:2-6: If the address received on the shared bus 16 matches the 10-bit

address provided by the slave address generator 64, then the particular

slave device 14 can respond according to the command.

Dkt. 36-3 at 11–14. To begin with, none of these references is excluded by the

Court’s construction. The above embodiments, moreover, do not suggest that

address generation is mere address provision. They instead suggest that where an

address generator is “incremented . . . a new random address is generated and self-

assigned.” And because a new address is never actually communicated or provided

back to a master device under the Address Change Patents, this in turn suggests that

address generators are envisioned to both generate and provide themselves with new

addresses. Lexmark cannot plausibly claim otherwise simply by citing passages that

contain the word “provide.”

Lexmark subsequently argues that UII’s current construction, which the Court

has now largely adopted, is based on a previous construction that the Court

considered and rejected. Dkt. S-272 at 7. This is somewhat true, but not surprising

or problematic. Since the original claim construction in this case, the parties have

been fighting about whether “generate” in “software or electronic circuitry

implementing an algorithm to generate address values by performing the specified

algorithm” should be understood as “provide” or “create.” Dkt. 117 at 14–21

(emphasis added). The Court rejected both terms and stuck with “generate” because

it was most true to the subject claim language; indeed, “generate” is found in a

plethora of claims and references. In so doing, however, the Court implicitly

recognized that “create” is a synonym of “generate.” Id. at 16. Thus, in adopting

“generate,” the Court did not wholly depart from UII’s original construction—it

adopted the construction originally offered by UII and replaced one word therein

with a closely related synonym. It would therefore make little sense for UII to

significantly abandon its original construction. Lexmark’s suggestion that UII is

attempting to relitigate claim construction falls flat.

Moving forward, the Court now turns to whether the UI Arwen Devices

utilize an “address generator” as that term has been constructed above. The parties

agree that source code in the UII Arwen Devices contains “a precomputed table of

6-bit partial I’C addresses . . . “referred to as AddrChgTable[.]” Dkt. S-247-6 at 73.

These addresses are never “generated” by the chips; they are prepopulated in the

code to match data utilized by Lexmark products. And in order to provide, change,

or self-assign these addresses, the UH Arwen Devices perform the following steps:

Steps to Provide Address

(1) Initialize the ASIC by copying PC address-change using the “InitAddrTable”

function;

(2) Receive an °C address-change request at the MCU from the ASIC by looping

in “ASIC IO” to repeatedly invoke “jNewRd.” which requests sub-

commands from the ASIC. The MCU is configured to respond to a

“NewAddr” with the address parameter 0x0170 to request its next □□□

address.

(3) Generate the next PC address at the MCU by performing the following steps:

a) access the table of °C address bytes by using the pointer “I2CAddrPtr”:

b) = load the next address byte into the low-order byte of a 16-bit register

while zeroing the top byte: and

c) update “I2CAddrPtr” to prepare the next address-change request.

(4) Transmit the new PC address from the MCU to the ASIC, by performing the

tollowing steps:

a) load three copies of the new address into the first three 2-byte words of

the array “I2C Shadow” and’

b) write all four words of “I2CShadow” in ASIC RAM starting at RAM

address 0x0420.

33

Dkt. S-247 at 12; Dkt. S-247-5 at 29–31.

This being the case, the Court finds that the UII Arwen Devices do not utilize

an “address generator” and consequently do not literally infringe the Address

Change Patents. The series of steps employed by the UII Arwen devices (the

algorithm) involves accessing a list of static, predetermined addresses, selecting the

next available predetermined address, and making it available. See Dkt. S-247 at 32

(Lexmark itself stating that the “UII Arwen Devices select addresses from a table

and provide that selected, new address to the ASIC”). This means that the software

or electronic circuitry therein implements an algorithm to provide address values,

not to generate them. The Address Change Patents require implementing an

algorithm that itself generates addresses. Accordingly, “every limitation recited” in

the Address Change Patent claims is not found in the UII Arwen Devices. See

Strattec Sec. Corp. v. Gen. Auto. Specialty Co., 126 F.3d 1411, 1418 (Fed. Cir. 1997)

(finding that “every limitation recited in the claim is found in the accused device”

when “the properly construed claim reads on the accused device exactly”). Summary

judgment in favor of UII is appropriate on the issue of literal infringement. See

Athletic Alternatives, 73 F.3d at 1578 (Fed. Cir. 1996) (finding that the question of

literal infringement is “amenable to summary judgment” where “the question of

literal infringement collapses to one of claim construction”).

Whether the UII Arwen Devices infringe under the doctrine of equivalents is

a related but different question. In this context, the essential inquiry is whether “the

accused product or process contain[s] elements identical or equivalent to each

claimed element of the patented invention[.]” Warner-Jenkinson Co. v. Hilton Davis

Chem. Co., 520 U.S. 17, 40 (1997). “The function-way-result test provides that ‘an

element in the accused device is equivalent to a claim limitation if it performs

substantially the same function in substantially the same way to obtain substantially

the same result.’” Tomita Tech. USA, LLC v. Nintendo Co., 681 F. App’x 967, 972

(Fed. Cir. 2017) (citation omitted). In assessing the “way” prong, the only prong

truly at issue here, the Court must determine whether “the way the accused product

performs the function . . . is ‘substantially different’ from the way . . . of the subject

patent.” Id. “The determination of equivalency is a question of fact[.]” Upjohn Co.

v. Mova Pharm. Corp., 225 F.3d 1306, 1309 (Fed. Cir. 2000). Hence, to prevail on

this issue on summary judgment, UII must show that there is a lack of genuinely

disputed material facts. See Celotex Corp, 477 U.S. at 323.

UII attempts to show that no genuine issue of material fact exists as to

equivalency by pointing to Dr. Walker’s equivalency analysis. Specifically, UII

argues that “[n]either Lexmark nor its expert provide any meaningful explanation or

evidence to establish the same function-way-result test as to each element(s)

Lexmark contends it met under the [doctrine of equivalents].” Dkt. 269 at 3.

“Instead,” UII argues, “Dr. Walker states generically that the accused devices

perform the same function, in the same way, to achieve the same result.” Id.

The Court largely agrees. Concerning the UII Arwen Devices and the “address

generator” limitation, Dr. Walker states that:

[W]hen UII Arwen Devices change to a next address among a list of

predetermined addresses, UII Arwen Devices, nonetheless, implement

an algorithm to change an address by performing the algorithm to look

up and change the address. In this way, UII Arwen Devices perform

substantially the same function as claimed, that is, to generate a new

address. Moreover, UII Arwen Devices generate the addresses in

substantially the same way, that is, by performance of a specified

algorithm. Finally, the result is substantially the same in that an address

is changed from an old address to a new address in a manner that is

coordinated between a master printer device and a slave toner device

such that the system continues to operate seamlessly after the new

address is implemented. It is my opinion that UII’s source code is

written with a full understanding of the manner in which microchips on

original Lexmark toner cartridges change addresses such that the

manner in which UII Arwen Devices change addresses is done to

achieve substantially the same function (i.e., change addresses), in

substantially the same way (i.e., implementation of an algorithm), to

achieve substantially the same result (i.e., implement a new address that

is coordinated between a printer and a toner cartridge).

Dkt. S-247-6 at 183. As an initial matter, it is fair to characterize Dr. Walker’s one

sentence “way” analysis as a conclusory expert assertion. Such assertions do not

raise issues of material fact. Sitrick v. Dreamworks, LLC, 516 F.3d 993, 1001 (Fed.

Cir. 2008) (“Conclusory expert assertions cannot raise triable issues of material fact

on summary judgment.”). Beyond that, Dr. Walker’s analysis—if it can be called

that—is based on an erroneous construction of “address generator” that directly

contradicts the proper construction. The UII Arwen Devices do not generate

addresses by performance of a specified algorithm, as Dr. Walker states. They

provide static, prepopulated addresses by performing an algorithm that amounts to

selecting and adopting the next value in a predetermined table. By solely relying on

Dr. Walker’s inadequate and conclusory opinions, Lexmark has failed to “come

forward with specific facts showing that there is a genuine issue for trial.” Shaw, 884

F.3d at 1098 (citation omitted). The UII Arwen Devices do not infringe the Address

Change Patents either literally or under the doctrine of equivalents.

ii. The Punch Out Bit Field Patents (‘786, ‘193)

UII alone requests summary judgment concerning infringement of the Punch

Out Bit Field Patents. UII argues that the UII Pensive devices do not meet at least

one element of Claims 2 and 6 of the ‘786 Patent or Claims 10 and 33 of the ‘193

Patent. Dkt. S-244 at 12–15.

While the disclosures of Claims 2 and 6 of the ‘786 Patent and Claim 10 of

the ‘193 Patent are provided in the Court’s invalidity analysis, see supra pp. 12–13,

Claim 33 of the ‘193 Patent (a dependent claim) has yet to be considered. It claims:

30. A memory module, comprising: memory cells for storing

information therein; and a plurality of signal lines for communicating

with a processing device, the memory module configured such that

following reception of a command on the signal lines and during

processing thereof, a voltage on a first signal line of the plurality of

signal lines is limited for a period of time by the memory module to be

no more than an intermediate voltage greater than voltages

corresponding to a binary zero value and less than voltages

corresponding to a binary one value, for indicating by the memory

module one of a busy condition and an error condition; wherein the

command pertains to usage of toner or ink in a consumable item for an

imaging device for instructing the memory module to punch out at least

one bit of at least one specified bit field within the memory module to

indicate the usage of toner or ink, and wherein the memory module

processes the command following the reception thereof.

32. The memory module of claim 30, further comprising at least one

electrical component coupled between the first signal line and a ground

potential such that the memory module passes current through the at

least one electrical component for limiting the voltage on the first signal

line to be no more than the intermediate voltage.

33. The memory module of claim 32, wherein the intermediate voltage

is based at least in part upon a resistance corresponding to the at least

one electrical component.

Dkt. 36-9 at 24. In light of this, and what has been discussed above, one dispositive

issue pertaining to literal infringement is whether the UII Pensive Devices receive a

command to change at least one specified bit, in a specific bit field, in one or more

non-volatile memory modules.6 Although construction of this limitation was

addressed in the context of invalidity, its importance for infringement necessitates a

more detailed discussion here. See WMS Gaming, Inc., 184 F.3d at 1346.

The parties’ disagreement over the meaning of “receiving a command to

change at least one specified bit, in a specific bit field, in one or more non-volatile

memory modules” ultimately boils down to whether this limitation encompasses

6 This limitation is found in Claim 10 of the ‘193 Patent as well as Claim 33 through its dependence

on Claim 32, which is itself dependent on Claim 30. Dkt. 36-9 at 23–24. This limitation is also

found in Claims 2 and 6 of the ‘786 Patent through their reliance on Claim 1. Dkt. 36-8 at 20.

reception of a command to copy RAM data (volatile memory) to EEPROM (non-

volatile memory). See Dkt. S-244 at 13; Dkt. S-262 at 13. Lexmark argues that it

does because a byte (what is copied from RAM by the UII device) is simply 8 bits,

and copying entire bytes comprised of punched out bits from RAM to EEPROM

“necessarily changes each punched out bit in each byte that is copied.” Dkt. S-262

at 13. UII argues that “there is no specified bit ‘punched out’” under this UII method.

Dkt. S-269 at 5.

As previously mentioned, Dr. Walker appears to waiver on this issue

depending on whether infringement or invalidity is at issue:

Q: Okay. And you change bits in this field – right? – as part of this

function, is changing bits in the field?

A: You can change bits in the field, but that doesn’t – doesn’t explain

that it is punching out a bit, and it doesn’t explain – so – and it doesn’t

explain how – that it’s – how that there’s a command to – that it receives

a command to punch out a specific bit in a bit field.

Q: Well, the Court’s construction was changing a – changing a bit is

punching out a bit, right?

[objection to the form of the question]

Q: Is –

A: I can’t remember. I don’t – the – the – the – you can only – let’s see.

So the claim requirements – the claim itself requires that you receive a

– that you receive a command to punch out a particular bit in a bit field.

And what this is showing is that you can write a – and this – this shows

that you write to a particular address, and I think that the two are distinct

for the reasons that I discussed in my report.

Q: Okay well, the Court said that “punch out at least one bit” means

“change at least one bit in nonvolatile memory,” right?

A: Yes . . .

*****

A: And it doesn’t explain that it also means that you – that you need

to receive a – that the rest of the claim requires that you receive a

command, not that – and the command is distinct from a[n] address

and a value.

Q: Okay. Well, this – this – the 1982 spec talks about receiving this

write memory command, right?

A: And the write memory command is comprised of an address and a

value.

Dkt. S-246-3 at 152–54 (Dr. Walker discussing DS1982 in the context of invalidity).

Ultimately, the Court once again finds that reception of a command to copy

RAM data to EEPROM in a UII device does not qualify as receiving a command to

change at least one specified bit, in a specific bit field, in one or more non-volatile

memory modules. Throughout the claims of the ‘786 and ‘193 Patents, the received

command itself specifies bits to be changed in a specified non-volatile memory bit

field.7 The description of the ‘193’ Patent further provides that, “[a]ccording to one

7 See ‘193 Claim 1 (“a command indicative of usage of toner or ink in a consumable item for an

imaging device for instructing the memory module to punch out at least one bit of at least one

specified bit field within the memory module”); ‘193 Claim 3 (“The method of claim 1, wherein

the at least one bit comprises a plurality of bits and the at least one specified bit field comprises a

plurality of separately specified bit fields such that each bit corresponds to a distinct specified bit

field”); ‘193 Claim 10 (“instructs the memory module to punch out at least one bit in at least one

specified bit field”); ‘786 Claim 1 (“a punch out bit field command operable to instruct the one or

more memory modules to punch out a specified bit field”); ‘786 Claim 9 (same).

aspect of the invention, each memory module in the imaging or printing device may

be directed to increment one or more page counts by a specified value or to punch

out a resource bit field.” Dkt. 36-9 at 17. The description of the ‘786 Patent provides

the exact same. Dkt. 36-8 at 15. The Court therefore agrees with Dr. Walker when

he says that “the claim itself requires that you . . . receive a command to punch out

a particular bit in a bit field.” Dkt. S-246-3 at 154. A command to copy data from

RAM to EEPROM, however, does not involve this level of specification. At least

one bit is inevitably changed in one or more non-volatile memory modules through

such a command, but those bits are only specified by the volatile memory data—the

command is generalized to copy whatever is contained therein. Finally, although the

Federal Circuit has not endorsed “a regime in which validity analysis is a regular

component of claim construction[,]” the Court notes that, under the construction

Lexmark advances in the infringement context, it is unclear how multiple claims of

the Punch Out Bit Field Patents are not rendered obvious by prior art. Phillips v.

AWH Corp., 415 F.3d 1303, 1327 (Fed. Cir. 2005). DS1982 receives commands

pertaining to usage of toner or ink in a consumable item for an imaging device and

processes them by copying data from volatile to non-volatile memory. See Dkt. 241-

6 at 20.

It follows that the UII Pensive Devices do not literally infringe the Punch Out

Bit Field Patents. The parties agree that that the UII Pensive Devices receive

“PunchBit” commands that are processed by “copy[ing] [an entire] bitfield’s current

value from [the subject printer’s] EEPROM to temporary storage” and then

“stor[ing] the punched-out bitfield in the [subject device’s] EEPROM[.]” Dkt. S-

247-6 at 59–61. This means that the UII Pensive Devices do not receive commands

that direct them to punch out at least one bit in a specified bitfield in non-volatile

memory—they receive commands that direct them to punch out specified bits in

specified bitfields in volatile memory and then eventually copy the entire volatile

memory bitfield to non-volatile memory. Accordingly, the subject limitation does

not read on the UII Pensive Devices in exact fashion. See Strattec Sec. Corp, 126

F.3d at 1418 (Fed. Cir. 1997).

Lexmark argues that “UII cannot avoid infringement by utilizing an extra step

of changing at least one bit, in a specific bit field in RAM prior to making the same

change in EEPROM[,]” Dkt. S-262 at 13, but this argument misses the mark. The

principle that “[i]infringement arises when all of the steps of a claimed method are

performed, whether or not the infringer also performs additional steps[,]” Smith &

Nephew, Inc. v. Ethicon, Inc., 276 F.3d 1304, 1311 (Fed. Cir. 2001), is not a means

by which patent litigants can bring the function-way-result test into literal

infringement analysis. In method claims using the signal word “comprising,”

“infringement is not avoided by the presence of elements or steps in addition to those

specifically recited in the claim.” Vivid Techs., Inc. v. Am. Sci. & Eng'g, Inc., 200

F.3d 795, 811 (Fed. Cir. 1999) (emphasis added). The UII Pensive devices are

missing the element of receiving a command that instructs them to change at least

one specified bit, in a specific bit field, in one or more non-volatile memory modules.

UII devices simply do not do that. Additionally, the Court did not find Lexmark’s

ice cream analogy persuasive. See Dkt. S-285 at 8. UII never punches out at least

one bit in non-volatile memory through specified command. Even if the ultimate

result might be similar in some instances, the methods are different. There is no

literal infringement here.

The Court concludes this section by noting that, with regard to the Punch Out

Bit Field Patents, UII has made no averments concerning its entitlement to summary

judgment of non-infringement under the doctrine of equivalents. Lexmark may

argue this issue to the jury.

iii. The Voltage Clamping Patents (‘136, ‘764)

The Voltage Clamping Patents have yet to be covered. On summary judgment,

Lexmark argues that the UII Pensive Devices infringe Claim 15 of the ‘764 Patent.

Dkt. S-247 at 36. UII argues that its devices do not infringe any of the asserted

Voltage Clamping Patent claims (Claims 1 and 9 of the ‘136 Patent and Claims 15

and 25 of the ‘764 Patent). Dkt. S-244 at 15.

These patent claims disclose:

1. A memory module, comprising: a plurality of memory cells; and a

plurality of signal lines for communicating with a processing device,

the memory module configured such that upon encountering a busy

condition while processing a command received by the memory

module, the memory module limits a voltage on a first signal line of the

plurality of signal lines for a period of time to be no more than an

intermediate voltage greater than voltage levels corresponding to a

binary zero state and less than voltage levels corresponding to a binary

one state when voltages on the first signal line is not limited by the

memory module, for indicating an occurrence of the busy condition,

wherein the memory module is configured to receive a clock signal on

the first signal line, and during the period of time in which the memory

modules limits a voltage on the first signal line of the plurality of signal

lines to be no more than the intermediate voltage, the memory module

1) receives the clock signal on the first signal line and 2) at the same

time indicates to the processing device the occurrence of the busy

condition by limiting the voltage on the first signal line to be no more

than the intermediate voltage [Claim 1, ‘136].

9. A memory device, comprising: a first signal line for receiving, by the

memory device, a clock input signal; a second signal line for

communicating address and data information; and a plurality of

memory cells and circuitry coupled to the first signal line and the

second signal line, the circuitry limiting a voltage level on the first

signal line for a first period of time to be no more than a first voltage

level in response to encountering a busy condition by the memory

device during processing of a command, the first voltage level being

less than voltage levels corresponding to a binary one state when

voltages on the first signal line are not limited by the circuitry and

greater than voltage levels corresponding to a binary zero state, wherein

during the first period of time, the memory device receives the clock

input signal on the first signal line from a processing device while at

the same time the memory device communicates to the processing

device an occurrence of the busy condition by limiting the voltage of

the clock input signal to be no more than the first voltage level [Claim

9, ‘136].

*****

15. A memory module, comprising: memory cells for storing

information therein; and a plurality of signal lines for communicating

with a processing device, the memory module configured such that

during processing of a command received on at least one of the plurality

of signal lines, a voltage on a first signal line of the plurality of signal

lines is clamped for a period of time by the memory module to be no

more than an intermediate voltage greater than voltages corresponding

to a binary zero value and less than voltages corresponding to a binary

one value, the voltage clamping for communicating by the memory

module to the processing device an occurrence of one of a busy

condition and an error condition; wherein the memory module is

configured to concurrently 1) receive a first binary input signal on the

first signal line and 2) clamp the voltage of the first binary input signal

to be no more than the intermediate voltage such that the voltage-

clamped first binary input signal being at the intermediate voltage

instead of one of the voltages corresponding to the binary one value

communicates the occurrence of the one of the busy condition and the

error condition by the memory module [Claim 15, ‘764].

24. A memory module, comprising: a plurality of memory cells; and a

plurality of signal lines for communicating with a processing device,

the memory module configured such that in response to encountering a

busy condition while processing a command, the memory module

clamps a voltage on a first signal line of the plurality of signal lines to

be no more than an intermediate voltage greater than voltage levels

corresponding to a binary zero state and less than voltage levels

corresponding to a binary one state for a period of time to communicate

to the processing device an occurrence of the busy condition; wherein

the memory module is configured to receive a first binary input signal

on the first signal line during the period of time the memory module

clamps the voltage on the first signal line to be no more than the

intermediate voltage such that the voltage-clamped first binary input

signal being at the intermediate voltage instead of one of the voltage

levels corresponding to the binary one state communicates by the

memory module to the processing device the occurrence of the busy

condition, the first binary input signal comprising an input clock signal

[Claim 24, ‘764].

Dkt. 36-12 at 27–28 (the ‘136 Patent); Dkt. 36-11 at 23–24 (the ‘764 Patent).

Thus far, the parties have agreed to the following constructions:

Claim Term8 Agreed Construction

“busy condition” “the memory module is busy processing

a previous command”

“voltage on a first signal line of the “a voltage on a first signal line of the

plurality of signal lines to be no more plurality of signal lines is limited to be

than an intermediate voltage greater no more than an intermediate voltage

than voltage levels corresponding to a which is greater than a voltage level

binary zero state and less than voltage representing a logical ‘0’ and is less than

levels corresponding to a binary one a voltage level representing a logical

state” ‘1’”

Dkt. 117 at 11. At this point, the parties do not appear to have any claim construction-

specific disagreements; rather, they disagree about whether the particular “command

preamble” received by UII Pensive Devices as part of a “command frame” functions

as a separate, “previous command.” See Dkt. S-256 at 8–9 (UII arguing that the

“command preamble is a single byte that contains no command to be processed . . .

it is a signal sent to identify the address of the specific device to which the command

data packet will be sent”); Dkt. S-262 at 14 (Lexmark arguing that “the command

preamble is, in fact, a command”).9

Before turning to this issue, however, the Court must address the admissibility

of Herman Schnell’s testimony. It is undisputed that Mr. Schnell is a member of UII

8 These claim terms were agreed upon in the context of the ‘764 Patent.

9 Whether or not this can be considered a matter of claim construction is immaterial. As the Court

will explain below, it is an underlying issue of material fact. And, although claim construction is

itself ultimately a matter of law, where claim construction requires extrinsic evidence such as

expert testimony to explain a disputed term “an underlying factual question may arise which makes

summary judgment improper.” Howes, 814 F.2d at 643 (Fed. Cir. 1987) (citation omitted).

and that he personally helped create the source code for the UII Arwen and Pensive

devices. Mr. Schnell was also deposed by Lexmark, and Dr. Walker referenced his

testimony dozens of times in his report on infringement. See generally Dkt. S-247-

10 (excerpts from Mr. Schnell’s deposition); Dkt. S-247-6 (Dr. Walker’s

infringement report). Lexmark nevertheless now argues that the Court “should

disregard Mr. Schnell’s opinions because he was not disclosed as an ‘expert’ . . . did

not issue a report . . . and did not make a [Rule 26] disclosure[.]” Dkt. S-262 at 7.

The Court will not disregard Mr. Schnell’s opinions. It is well established that

lay witnesses may testify “based on particularized knowledge gained from their own

personal experiences.” United States v. Hill, 643 F.3d 807, 841 (11th Cir. 2011). As

a result:

most courts have permitted [owners and officers] to testify . . . without

the necessity of qualifying the witness as an . . . expert. Such opinion

testimony is admitted not because of experience, training, or

specialized knowledge within the realm of an expert, but because of the

particularized knowledge that the witness has by virtue of his or her

position in the business.

Tampa Bay Shipbuilding & Repair Co. v. Cedar Shipping Co., 320 F.3d 1213, 1222

(11th Cir. 2003) (emphasis and alterations in original) (citation omitted). Here, Mr.

Schnell has particularized knowledge of the UII Arwen and Pensive Devices—he

wrote the source code that makes them work. This is why Lexmark deposed him,

and also why Dr. Walker cites Mr. Schnell’s opinions throughout his report. Dr.

Schnell may therefore testify as to the UII Arwen and Pensive Devices’ source code.

Still, “the fact that [Dr. Schnell] may have particularized knowledge and experience

as a co-inventor of the [accused devices] does not necessarily mean he also has

particularized knowledge and experience in [anything else].” Air Turbine Tech., Inc.

v. Atlas Copco AB, 410 F.3d 701, 714 (Fed. Cir. 2005). The admissibility of his

opinions is consequently limited. Mr. Schnell may not opine in expert fashion on

issues beyond his purview. Id.

Moving back to the Voltage Clamping Patents, however, the Court finds that

a material issue of fact precludes summary judgment for either party. Each of the

asserted claims of the Voltage Clamping Patents contain at least one “busy

condition” limitation. Whether this limitation reads on the UII Pensive Devices turns

on which expert is right about the nature of the “command preamble” that UII

Pensive Devices receive prior to voltage reduction. While Dr. Walker treats the

“command preamble” as a separate and unitary command, see Dkt. S-247-8 at 13,

Mr. McAlexander claims that:

Dr. Walker’s analysis uses the correct Court claim construction for the

term “busy condition.” However, as explained in more detail later in

this Supplemental Rebuttal Report, Dr. Walker incorrectly applies this

construction to include a condition that occurs while a command is

being received rather than while a previous command is being

processed, as required by the Court’s claim construction. In essence,

Dr. Walker breaks up a command received into two parts, the preamble

and the data packet. He then labels the preamble as a previous command

such that, while receiving the remainder of the same command data

packet portion, Dr. Walker unbelievably concludes that a previous

command is being processed. Nothing is further from the fact. The

preamble address sets up the module to receive the command data

packet. This type of command packet handling methodology has been

a standard in packet processing for multiple decades. Command packet

composition structure has been and still is a combination of, e.g., source

and destination addresses, type of command, configuration/command

specific information, and associated command data. To arbitrarily

segregate the preamble as its own command is completely outside the

understanding of an ordinarily skilled artisan and is inconsistent with

the teachings of, and not supported by, the ‘193 Patent.

Dkt. D-247-7 at 46–47. This dispute is not clearly resolved by the testimony of Mr.

Schnell or the Lexmark Pensive Specification UII largely addresses through attorney

argument. A classic battle of the experts therefore exists. And this renders “summary

judgment improper.” Edwards Sys. Tech., Inc., 99 F. App'x at 921; see also Crown

Packaging Tech., Inc., 635 F.3d at 1384; TriMed, Inc., 608 F.3d at 1343. The parties

may argue their respective positions to the jury along with any other Voltage

Clamping Patent infringement issues.

IV. Whether Lexmark Products Practice the Asserted Claims

As Lexmark notes, whether a patentee practices the asserted claims of its

patents can be relevant to a number of issues in any given patent infringement case.

Lexmark requests such a finding here—presumably for purposes of damages. Dkt.

S-247 at 41–42. UII, on the other hand, argues that Lexmark has not established that

its products practice all of the asserted claims. Dkt. S-256 at 12.

The Court finds that issues of material fact preclude summary judgment on

this issue as it relates to the Voltage Clamping Patents and the Punch Out Bit Field

Patents.10 Although Dr. Walker is the only expert to examine Lexmark’s products,

his resulting opinions rest on factually contested issues or overly broad

constructions. For instance, Dr. Walker’s view that Lexmark’s Pensive microchips

practice the Voltage Clamping Patents wholly depends on his understanding that the

command preamble received by said microchips is in fact a “previous command.”

See Dkt. S-247-6 at 253. Dr. Walker nevertheless fails to differentiate the command

preamble received in Lexmark’s Pensive chips from those received in UII’s. And,

as the Court explained above with reference to Mr. McAlexander’s opinions, it is

not clear that a single byte of an entire command frame sent to identify the address

of the specific device to which the command data packet will be sent can itself be

understood as a unitary command by one with ordinary skill in the art. If the evidence

at trial shows this to be true (or Lexmark’s command preamble to be of a different,

qualifying nature), Lexmark will be entitled to a finding that its Pensive microchips

practice the Voltage Clamping Patents. If not, such a finding does not necessarily

follow from Dr. Walker’s report despite the fact that UII’s expert did not directly

examine Lexmark’s products. Additionally, as to the Punch Out Bit Field Patents,

Dr. Walker “applied the same constructions” that the Court previously found to be

erroneous in scope. Id. at 258–59. It would therefore be questionable to rely solely

10 The Court has found that the UII Arwen Devices do not infringe the Address Change Patents

literally or under the doctrine of equivalents. Whether Lexmark’s products practice them is

therefore irrelevant.

on his opinion, as written, to grant summary judgment on the issue of whether

Lexmark’s products practice the Punch Out Bit Field Patents. Further clarification

is necessary to determine the impact of the Court’s findings on Dr. Walker’s

opinions.

V. Damages

The final issue to consider is the availability of lost profits.11 UII argues that,

even if infringement is proven, Lexmark cannot establish them. Dkt. S-244 at 46–

47. Lexmark responds that, at the very least, there is an issue of material fact that

precludes summary judgment on this issue. Dkt. S-262 at 21–24.

The Court agrees with Lexmark. 35 U.S.C. § 284 provides that “[u]pon

finding for the claimant the court shall award the claimant damages adequate to

compensate for the infringement, but in no event less than a reasonable royalty for

the use made of the invention by the infringer[.]” As the Federal Circuit has

explained, this opens the door to compensatory damages, such as lost profits, based

on “but for” causation. See Mentor Graphics Corp. v. EVE-USA, Inc., 851 F.3d

1275, 1284 (Fed. Cir. 2017). It is ultimately “the fact finder’s job” to determine what

a patent holder’s profits would have been but for an infringer’s actions. Id. at 1285.

11 While the parties initially disputed the propriety of pre-suit damages, they have apparently

stipulated that “Lexmark is entitled to recover pre-suit damages with respect to the UII Pensive

Devices that [allegedly] infringe the ‘786 Patent.” See Dkt. S-262 at 25; Dkt. 269 at 8.

Nothing presented here precludes the jury from considering this issue. UII’s

argument to the contrary primarily revolves around whether Lexmark can

demonstrate but for causation and satisfy apportionment principles under the

Panduit12 test. See Dkt. S-244 at 46–47. The Court need not answer these questions,

though, because “[t]here is no particular method required to prove but for causation.”

Mentor Graphics Corp., 851 F.3d at 1284. To be sure, the Panduit test is only one

“useful, but non-exclusive” means of doing so. Id. And given the particularities of

this case, it is not clear that the Panduit test is appropriate. Regardless of the fact

that UII was selling its products to remanufactures while Lexmark was selling to end

users—an apparent issue for treating the demand for UII’s products and Lexmark’s

products as interchangeable—a material issue of fact exists as to whether each of

UII’s sales directly caused Lexmark to lose a customer. This is because Lexmark

plausibly argues that (1) UII’s devices would not allow aftermarket toner cartridges

to work in Lexmark printers without certain aspects of Lexmark’s patented

technology, and (2) customers would be forced to buy Lexmark products if UII was

not helping remanufacturers produce infringing substitutes. These factual issues may

be addressed at trial though expert testimony. If Lexmark fails to establish but for

12 See Panduit Corp. v. Stahlin Bros. Fibre Works, 575 F.2d 1152, 1164 (6th Cir. 1978); Mentor

Graphics Corp., 851 F.3d at 1285 (listing the Panduit factors as: “(1) demand for the patented

product; (2) absence of acceptable non-infringing alternatives; (3) manufacturing and marketing

capability to exploit the demand; and (4) the amount of profit it would have made”).

causation or properly apportion damages under Federal Circuit precedent, UII may

reassert its position on a motion for judgment as a matter of law or directed verdict.

CONCLUSION

Lexmark is granted summary judgment finding that Claims 15 and 24 of the

‘764 Patent, Claims 1 and 9 of the ‘136 Patent, and Claim 33 of the ‘193 Patent are

not invalid. UII is granted summary judgment finding that the UII Arwen Devices

do not infringe the Address Change Patents either literally or under the doctrine of

equivalents, and that the UII Pensive Devices do not literally infringe the Punch Out

Bit Field Patents. The parties may argue unresolved issues to the jury.

Accordingly, it is hereby ORDERED and ADJUDGED:

(1) Lexmark’s Motion for Partial Summary Judgment (Dkts. 242/S-247) is

GRANTED-IN-PART and DENIED-IN-PART.

(2) UII’s Motion for Summary Judgment (Dkts. 239/S-244) is GRANTED-

IN-PART and DENIED-IN-PART.

DONE AND ORDERED at Tampa, Florida, on October 12, 2023.

/s/ William F. Jung

WILLIAM F. JUNG

UNITED STATES DISTRICT JUDGE

COPIES FURNISHED TO:

Counsel of Record