# Appendix — Amperex Electronic Corp. v. New York Racing Ass'n

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## Record

- **Collection:** Supreme Court brief
- **Document type:** Appendix
- **Published:** January 1, 1977
- **Citation:** 434 U.S. 860

## Text

In THE

Supreme Court of the United

Octosper TERM 1976

Amperex Exvectronic Corp.,
Petitioner,

—Vi—

Tue New York Racine Association, Inc., AUTOMATIC
Torauisators (U.S.A.) Lrp., Automatic ToTaLisaTors
Lrp., and Premier Equipment PRopRieTaRy Ltp.,

Respondents.

APPENDIX TO
PETITION FOR WRIT OF CERTIORARI TO THE
UNITED STATES COURT OF APPEALS
FOR THE SECOND CIRCUIT

S. C. Yurer
122 East 42nd Street
Suite 3601
New York, N. Y. 10017
212-986-1221

Counsel for Petitioner

Of Counsel
Yutrer & Roser
Danret M. Rosen

INDEX TO APPENDIX

PAGE

Opinion of the United States

Court of Appeals for the Second

Cireutt, April ©, WIT cecoccccces Al

Memorandum and Order of the

United States District Court

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Findings of Fact and Order

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Judgment filed September 22, 1975 A255

Memorandum and Order of the
United States District Court
Dated January 13, 1976 .......6-. A257

DE nbn

A27

derived from the plugboard classification of
the TIM. Once the bet had been registered
in the memory, (or on receiving a standby
signal from a TIM that had no transaction),
the interpreter was to signal the TIM to
“unlock.” If such a signal did not follow im-
mediately upon the scan cycle, the TIM was
to ‘lock up.’ The “unlock” signal was to in-
dicate registration of the bet (or simply to
act as an added check in the case of the TIM
with no transaction). The interpreter was
also to make several types of checks against
malfunction or erroneous betting.

The fourth element in the data ac-
cumulator was to be the memory whose
function was to store information required
for computations and for print-out or visual
display. One section of the memory was to
store the total wagers on each horse entered
in the race in the appropriate win or place or
show pool. A second section of the memory
was to store the total for each TIM using the
same dollar figures that were added to make
up the pool totals for each horse. A detailed

rint-out of the TIM was to be automatical-
ly available.

The fourth major component comprised
in che totalisator system proposed was the
computer. It was to compute and recompute
the odds at the completion of each scan of
the TIMs and store the odds data for
posting at frequent intervals. At the end of

A28

the race the pay off was to be computed and
available for posting within five seconds.
The computer memory was to store the data
needed for pay off results as well as other
constants required to determine the odds.

The fifth major component comprised in
the totalisator system was to be the display
equipment. It was to exhibit the amounts
bet on each horse for win, place and show,
the total win, place and show pools, and the
odds. The display material was to be
brought up to date every 70 seconds. A local
display panel was to be provided for
re the data before it was fed to the
main display board (usually in the infield).
After each race the payoffs were to be dis-
a po as soon as they had been computed
and monitored.

Discussions between Digitronics and
Roosevelt Raceway continued over a
protracted period and by November of 1959
the parties were talking in terms of first
building a prototype or “simulator” on a
small scale to demonstrate how the actual
system of ticket dispensing, computation
and display would function for both daily
double and regular operations. A sort of
specification was then prepared (Ex.94-A)
and later incorporated in Ex.Ap but it dealt
essentially in what the prototype would do

A29

and show and how it would differ from the
production model that was also in con-
templation, and it did not give any specifica-
tion of its components and system.
However, enough appears from it to indicate
that it was at least roughly compatible with
the May 11, 1959, outline of the preliminary
proposal so far as the system envisioned was
concerned. |
The outline for the demonstrator was in-
cluded as the first of the exhibits or —
dices annexed to the agreement (Ex.AP) ul-
timately made between Westbury Elec-
tronics Corp. and Digitronics which was un-
der discussion from December 1959 and
which was in form dated January 31, 1961
but which in fact was signed somewhat
later, and after the failure of a protracted ef-
fort to secure the participation in the ven-
ture of Yonkers Raceway, Inc., ‘Exhibit B,
(Ex.94B), incorporated in that agreement
(Exhibit AP), was pease prepared in
February of 1960. Exhibit 94B visualized a
470 TIM installation about a quarter of
which would be daily double TIMs. Exhibit
94B visualized a plan which would provide
for a scan of each TIM four times per sec-
ond. A scan sequence in terms of win, =
and show by denominations was assumed,
and it was slonned that each TIM should be
scanned even if locked and unused, the effect
of such a scan being a zero accumulation.

A30

f ° ° ° °
The scanner was to feed its information into
the central unit. The central memory for ac-
cumulating information was to be of two un-
its, one to be called the ‘“‘window” memory,
which would accumulate the total transac-
tions for each horse at each window,
—— information to an_ individual
igh-speed printer. The second unit of the
memory was the parimutuel memory which
was to accumulate the betting deen hee each
of the win, place and show pools for each of
the horses (Ex. 94B, Figure 3-A). In the cen-
tral unit both parimutuel calculation com-
ponents would be duplicated, each com-
putation would be done twice, and the
results would be compared with a previous
computation on that machine as well as the
computation on the cuplicate machine. In
addition the data would be checked into and
out of the memory. The operator of the en-
tire machine by operating an appropriate
control on the central panel could bypass
any defective section of the dual machine for
repair while the rest continued to operate.
The ‘‘window’’ memory (i.e., TIM
memory) would serve as an additional
spare, since the amounts bet could be
calculated, if need were, from the individual
TIM accumulation of transactions for each
Post-position in each race by the bettin
denomination and finish-classification o

A31

that TIM. “Exhibit B’’ annexed to Exhibit
AP (i.e., Ex. 94-B) visualized that the basic
unit for the entire machine would be the
“timer unit,’’ which was to “enable’’ data
into and out of the memory, and cause the
selection of the appropriate window
imachine for interrogation during the TIM
scan; during the computation the timer
would arrange for a different sequence of
accesses to the memory, as required by the
computational procedure. In the system of
Ex. 94-B during a scan, as a TIM is examin-
ed, the selected horse number will include a
check signal which the central unit would
examine; if satisfactory, and if the resultant
computation in the central unit is satisfac-
tory, a “confirm” signal would be sent back
to the TIM. Receipt of that ‘‘confirm’”’
signal would permit the TIM to issue the
betting ticket. Absent a ‘“‘confirm”’ signal the
TIM would lock up — a result that either
mechanical defect or the “‘scratching”’ of a
horse could precipitate.

Under the proposed system ‘“‘memory”’
would be of the ‘‘coincident current
magnetic core type.’’ The memory arrange-
ment would accommodate a total of 12 bits
(that is a magnetic imprint on a tiny an-
nulus), eleven to be used for data ard one as
a parity check. Each time a total came from
the memory it was to be checked for an odd
number of bits as well as for identity with

A32

the quantity being read out of the duplicate
memory. Once every 70 seconds during the
constant scanning of the memory an odds
computation would be performed. The bets
were to be translated into dollars as the
computation occurred. Since the TIMs
would be identified and their denomination
and win, place or show classification known,
the raw storage element would be the
number of bets at each TIM, but in the
memory they would be grouped by their
classes and as so accumulated multiplied by
their appropriate dollar amounts to give the
total of the pool for each finishing position.

At the end of the betting the output of the
TIM memory was to control a high speed
printer. This was to print-out the number of
wagers at each TIM on each of the max-
imum of 10 horses that can be entered in a
race at Roosevelt Raceway. Calculating
room and infield displays were to be provid-
ed in considerable detail.

The part of Exhibit. 94B (page 7, et seq.),
dealing with the operation of the system,
gives a clearer idea of the circuitry and its
relation to the demonstrator. To initiate the
betting, an operator at the central control
must press the “‘start bet’’ contro] button
and, by so doing, allow the issuance of
tickets by the TIMs. Depressing the start

A33

bet control button clears the memory and
initiates the scanning of all the TIMs. (This
is the initial clear signal (ICL) of the patent,
which originates at the console as shown in
plaintiff’s Exhibit 4 which combines Figures
1A and 1B of the patent). Probable odds
and money totals are we and the
operation continues until the end-bet con-
trol button is pushed. Whenever a horse is
scratched, the operator depresses the
“scratch” button for that horse number,
and that prevents any TIM from issuing a
ticket on the scratched horse. (This is in-
dicated in Exhibit 4 at the console in the
series of SKW keys or levers which are
numbered from 1 to N.) At each TIM at the
end of the race, a printout of the individual
horse transactions at that TIM is effected.
When the winner has been determined, the
control operator can press the Win button
and the button for the appropriate horse (or
— in the case of a dead heat — horses) and
the “‘calculate’’ button; the result is to dis-
play in the calculating room the payoff on
the winning horses. Similarly, the calcula-
tion and display are made for the show and
place horses. A complete breakdown of the
central system is backed up by the

accessibility of the individual paper tapes of

all transactions kept at each TIM as the
wagers are made. These are fed into an
offline window totalizer which is in effect a

A34

high speed paper tape reader and an ac-
cumulation facility.

Under the ‘“‘physical description” portion
of Exhibit 94B, the presentation explains
that electronic data gathering, calculation
and control units, as well as the display and
printout units, will be at the central loca-
tion, and that the electronic memory and
calculation circuits would be housed in ten
racks, one of the racks including the
plugboard, which could be arranged to
determine the wager denomination and
nature (as between win, place and show) of
the TIMs. Scanning is to be by a central
electronic scanning unit, and a control con-
sole would give the operator control of the
displays and printouts; the console would
include switches, buttons and associated in-
dicators arranged for convenient operation.
In addition, there are to be at the central
control location (as noted above) a high
speed 48 column printer to provide the prin-
touts, earlier described; the printer would
operate at 600 lines per minute; a pair of
lister type printers would provide a 10
column, 3 line per second printout. These
listers could also function as standby equip-
ment for the high speed printer above
described. There would also be included a
perforated-tape reader to read the tape and

A35

cause the printout on the listers during off-
line totalizing.

The presentation describes also, at page
14, the types of errors that the system would
be able to detect and make provision
against. It notes that two processes occur
simultaneously as the system operates: first,
accumulation of the number of bets at each
betting denomination for each horse and in
each of the win, place or show pools and,
second, the accumulation of the number of
bets for each horse at each TIM (the
MEMA and WM of the patent). It describes
a four way check on the first process con-
sisting in performance of the process by two
computing sections, each of which checks
both against itself and against the other.
The second process is subject to only a two
way check since it does each operation twice
and thus checks against itself. Tne first

rocess is used to determine the parimutuel
etting operation and cannot permit error
or down time. Transient error is to be in-
stantly detected and signalled to the
operator, but the machine must
automatically select the section which is
providing the correct answer and establish
the correct answer in both of the duplicating
sections. Hence, a transient error, it is

rovided, might be detected and corrected
7 the computer and thus be classed as a
detected and corrected error. If in the first of

A36

the two processes one side fails to operate at
all, it would report ‘‘error’’ to the operator
and could be om a out of action by operator
intervention. Such an event is described as
an ‘“‘outage”’ error. During such an outage
the parimutuel section will be operating es-
sentially on the same basis as the TIM sec-
tions, that is, it will do each calculation
twice and check the second result against
the first. Any detected error is reported in
detail to the operator while the TIM scan-
ning process continues. Detected and
reported errors take the shape of printouts
on the lister of the TIM and horse number
involved in the error. Since an error transac-
tion is never entered in the totalizing
memory, a TIM with a defective machine
can continually report defective data which
will not be acceptable to the computer, and
such a window will be automatically locked
up at each scan regardless of the ticket
seller's efforts. This type of error would be
classed as a “‘window-lockup”’ error.

Exhibit AP was not actually signed until
over a year after its Exhibits A and B (Ex-
hibits 94A and 94B respectively in the pres-
ent suit) were prepared. Meanwhile there
was a protracted effort to bring Yonkers
Raceway into the transaction and a good
deal of discussion within Roosevelt

A37 —|BEST GOPY AVAILABLE

Raceway’s organization about how to han-
die the Amtote situation. The Raceway con-
tract with Amtote was to expire at the end of
the 1960 racing season, and Roosevelt
Raceway was anxious to change that rela-
tion materially. At the same time that
Roosevelt was considering trying to work
out radical changes in its relation with Am-
tote, it was gg Be possibility of an
arrangement with Western Totalizator
Company, apparently a subsidiary of
American Dryer Corporation and identified
with Joseph Lease as its principal negotiator
and perhaps a principal in the firm. At the
same time, negotiations with Digitronics
were pushed along in the general framework
of spending something like $100,000 for a
prototype to be followed by a complete in-
stallation at a cost approximating
$1,100,000. Roosevelt Raceway’s ideas em-
braced, as the draft agreement indicates, a
visualization that it would itself get into the
totalizator providing business. Digitronics
was not unaware that it was at least possible
that Roosevelt Raceway was ri, playing
it off against Amtote, and Digitronics
prepared itself in some circumstances to see
whether it could not form some kind of
alliance or other with Amtote, providing
Amtote with electronic know-how for the
modernization of its equipment and taking
advantage of Amtote’s position and ex-
perience as well as its specific skills and of

A38

Amtote’s access to the Bell-Punch TIMs,
the TIMs successfully used by Amtote in its
electromechanical installations. By late
March 1960, Digitronics was becoming con-
vinced that Roosevelt Raceway might well
decide on the prototype at least, and near
the end of March, 1960 Roosevelt Raceway
had an experienced man in effect go over the
Digitronics materials. His report approved
the Exhibit 94B proposal as satistactory for
acceptance but he had criticisms of details,
particularly with respect to error frequency.
On March 31, 1960 the executive committee
of Roosevelt Raceway was told that an in-
vestigation of Digitronics’ installations at
Bache & Co., Merrill Lynch, Pierce, Fenner
& Smith and other brokerage firms had
been made and that the installations were
said to operate to complete satisfaction. It
was also reported that the electrical
engineer who had been hired to check up on
Digitronics had discussed with Digitronics
engineers ‘‘the method and system which
they intend to initiate in the manufacture of
the machines to be designed and offered,”
that he had checked on their ability to
produce and their time table for completin

the prototype, and that apparently he ha

found nothing wrong with them; it was
reported to the executive committee that the

A39

retained expert had explained the “‘tremen-
dous advantages”’ of electronic computa-
tion, and expressed his belief that an elec-
tronic installation was capable of much
greater reliability than an electrical installa-
tion. It was thought that the equipment
could be installed at Roosevelt Raceway for
a sum not to exceed $1,200,000, indepen-
dent of the prototype, which was not to ex-
ceed $190,000 in cost; the executive com-
mittee recognized that the investment
would be depreciable for tax purposes and
would, in addition, eliminate the cost for
commission and rental incurred with Am-
tote which amounted to $473,000 for 1959.
In light of all this, it was recommended to
the committee that the president of the
Raceway be authorized to negotiate with
Digitronics for the best possible terms. At
the next Directors’ meeting, on April 19,
1960, there was an authorization to contract
with Digitronics on the basis of the
proposals submitted by Digitronics; under
these, Roosevelt would acquire a 47 2% in-
terest in a distributing company, Yonkers
would acquire another 47%% and
Digitronics the remaining 5%.

The negotiations dragged on in the con-
templation that a new company, Westbury
Electronics Corporation, would be the vehi-
cle of acquisition of the electronic equip-
ment and act as a means of entry into the

A40

distribution of such equipment, and it was
emphasized that, after the building of a
paw. and subject to its being approved

y the New York Racing Commission, or by
Raceway itself, there would then be an un-
dertaking to build and complete the first
totalizator by December 31, 1962 at a cost of
$1,215,000. As nothing had come to a head,
finally, at the last part of May, Roosevelt in
effect requested Digitronics to proceed on a
letter-of-intent basis (because of the impor-
tance of Digitronics’s proceeding im-
mediately to place the necessary orders for
components of the prototype); in its letter to
Digitronics, Roosevelt Raceway undertook
to save Digitronics harmless from any
liability under a contract made by
Digitronics and American Electronics for
the production of prototype TIMs and such
other expenses as Digitronics might incur
through its engineering and other work per-
formed for the benefit of the contract and in
anticipation of its execution. It was un-
derstood that the indemnity would cease
and terminate upon execution of the master
contract.

Evidently, work did proceed at that time.
On June 1, Digitronics reported to its direc-
tors that the formal contract to be executed
with Westbury Electronics Corporation was

A41

being delayed because of difficulties en-
countered with Yonkers, but that
Digitronics was proceeding on the basis of
the letter of intent with the building of the
prototype for Westbury Electronics, to be
ready by December 1960. By the time of the
publication of its year end report to its
stockholders on June 30, 1960, Digitronics
felt able to characterize the work on the
Roosevelt Raceway prototype as “Among
the more spectacular systems designed dur-
ing the year.’’ The prototype was described
as ‘“‘an electronic totalizator which should
demonstrate, at greatly accelerated speeds
and accuracy (and at sharply lower cost),
the electronic recording and computing of
bets at the harness and thoroughbred race
tracks throughout the world.”

It will have been noted that the letter of
intent referred to the acquisition of TIMs
from American Electronics, Inc.; however,
Digitronics was also, through the ubiquitous
Joseph Lease, put in touch with Bell Punch
Company, Ltd. in London with a view to
working something out to wed the TIMs of
Bell Peach and the electronics of
Digitronics; and work was going forward
also with Taller & Cooper on the produc-
tion of Hohmann TIMs (two of which were
in the end used with the prototype).

While the work was going forward at

A42

Digitronics, Joseph Lease, for Western
Totalizator, continued to put forward to
Roosevelt Raceway his competing equip-
ment and to disparage Digitronics.
Meanwhile, + eibioes Racew2,'s efforts to
negotiate effectively with Amtote had pretty
much failed, and, bs the end of September,
Roosevelt Raceway, although encouraged
by Digitronics’s reports of progress with the
prototype, had .questions in its own mind
about whether the equipment could be fully
operable and able to serve the raceway by
May 1961. Accordingly Roosevelt Raceway
reconciled itself to negotiating the best
terms it could with Amtote looking toward a
five year contract with Amtote for equip-
ment at the raceway. Still negotiations were
being conducted with the Yonkers
Raceway, and nominally with Digitronics,
while (at the end of September) it was ex-
pected that by November 15 the prototype
would be ready for demonstration.

In this period in which work was getting
underway on the actual building of the
rototype, after the pre aration of the “‘Ex-
hibit A” and “Exhibit B,"’ (Exs. 94A, 94B)
specifications annexed to the contract Ex-
hibit AP, the work at Digitronics was under
the direction of Kiehlson; the overall logic
was apparently in large part, if not entirely,
supplied by Shaw of Electronics.

A43

The connection of Mr. Weida with the
project at Digitronics (where « was iden-
tified as Job 4726) dates from shortly after
Labor Day of 1960. Shaw was an experienc-
ed system and logic design man who had
worked on one of the historic computers, the
ENIAC; he had been in computer
technology from the late '40s. The logic was
well in hand, and Weida got a lengthy logic
write-up from Shaw when the work was
turned over to him; much of the construc-
tion of the prototype was complete, and
much of the wiring done; it was essentially
Weida’s job to follow through to get
operability. The equipment was complete as
a first go-around, but it had certainly not
been debugged. It was first powered-up in
mid to late September, but it did not at once
work. There was at least one specific
blunder in the system as it then existed — in
the odds computation and payout part —
and that had to be planned around. The
first demonstration of the prototype was in
mid November (see Exhibits CP, 89, 89A,
and AQ). The first demonstration, planned
for mid-November 1960, was not to include
demonstrating the daily double, but only
the regular betting capabilities of the

prototype.

By January 18, 1961, Digitronics was tak-
ing the view that production of the

A44

prototype was then virtually completed but
that, because of the difficulties with the
Taller & Cooper TIMs, the completion of
which cp had had to take over,
costs of the prototype would be closer to
$150,000 than to $100,000; it was also in-
dicated that the anticipated cost of the first
totalizator would be $1,500,000 rather than
$1,215,000. At this time Digitronics was
becoming impatient with the delay in sign-
ing the contract and sought to threaten
Roosevelt Raceway with abandoning the
transaction after ye of and payment for
the prototype; that threat was met with
Roosevelt Raceway's insistence that
Digitronics could not expect payment for
the prototype on contract terms if it aban-
doned the undertaking to complete the first
totalizator.

Finally, on January 30, 1961, Westbury
Electronic me. was organized. At the
same time, the Digitronics-Westbury agree-
ment was put in substantially final form, ex-
cept that it still assumed and provided for
the participation of Yonkers. It was dated at
January 31, 1961, and was signed by
wis ohn and Westbury, although,
perhaps not until some days after its date. It
continued to have as its “Exhibits A’’ and
“B”, respectively, the November 1959
specification for the prototype (Ex. 94A)

A45

and the February 1960 specification for the
first totalizator (Ex. 94B). There was also
preperse and ultimately signed by West-

ury and Digitronics a guarantee by West-
bury to Digitronics of one half of the
amounts payable by Westbury under the
totalizator agreement and service
agreements between Westbury and
Digitronics. It had been contemplated that
Yonkers would also give a 50% guarantee,
but with the later withdrawal of Yonkers
from the matter, that portion of the agree-
ment was stricken out.

_A copy of the a i was sent to the
New York State Harness Racing Commis-
sion under date of February 12, 1961, and
about February 23, 1961, Roosevelt arrang-
ed to put $150,000 into Westbury —
$99.000 of it as a loan and the balance as the
tie for 51% of the stock — the $150,000 to
used to pay for the prototype.

The agreement of January 31, 1961,
provided in paragraph 2 that Digitronics
agreed ‘to design. manufacture, sell and
deliver to Westbury, and Westbury agrees
to purchase from Digitronics, a Prototype,
meeting the specifications set forth in Ex-
hibit ‘A’ hereto, and the First Totalizator
meeting the specification set forth in Exhibit
B’* * *.” There was prepared a proposed
modification of the contract which would

A46

have altered paragraph 2 to provide that
Digitronics agreed ‘‘to design and produce a
Prototype meeting the specifications * * *
and agrees to design, manufacture, sell and
deliver to Westbury, and Westbury agrees
to purchase from Digitronics, the First
Totalizator, etc.’’ Paragraph 3 of the agree-
ment, which referred to delivery of the
prototype and satisfactory completion of the
acceptance test, would have been modified
to strike out the reference to ‘“‘delivery.”
Similarly in paragraph 4 a reference to
delivery of the prototype would have been
stricken out, leaving simply references to
completing the prototype. There is no com-
petent evidence that amendatory agreement
was executed by the parties. One copy of it
was, indeed, signed by the president of
Digitronics, but it does not appear that
Westbury ever signed it. If the agreement
had any purpose, it was apparently to make
the formal point that there was not a “‘sale”’
of the prototype. The prototype was, in fact,
first set up and demonstrated at Digitronics.
Somewhere at or about the end of March
1961, Digitronics prepared ane sent to
Westbury a bill for $150,000 for the
rototype showing total material cost and
abor charges of $158,478.31 whereof
$150,000 was invoiced to Westbury. The
prototype was moved to Roosevelt Raceway

A47

in early September 1962. Demonstrations of
the prototype after that date took place at
Roosevelt under the supervision of
Digitronics personnel. Ultimately the
prototype was stored at Roosevelt Raceway
and is still there. In April 1961, when
Yonkers Raceway had fairly clearly retired
from the transaction, Digitronics in effect
took up the Yonkers share of the stock of
Westbury for an agreed price of $49,000.

At the April 18, 1961 meeting of the
stockholders of Roosevelt Raceway, the
president of the raceway advised the
stockholders that Digitronics had completed
a prototype of an electronic totalizator for
Roosevelt Raceway and added, “It operates
to the fullest extent we would require. At the
moment it is custom built.” Later, in the
meeting, commenting on Digitronics (and in
the context of justifying the Rescear invest-
ment in Westbury) the president advised the
stockholders that Digitronics ‘‘have
deveioped an electronic totalizator that will
revolutionize the tote business.”

The actual payment of money into West-
bury Electronic did not take place until on
or about May 1, 1961; at that date formal
financing agreements were executed
between Digitronics and Roosevelt
Raceway. About May 2, 1961 the Westbu
Electronic Corp. formally opened its ban

A48

account with Morgan Guaranty. On May
10 Westbury drew its check on Morgan
Guaranty to the order of Digitronics for
$149,000 apparently in payment ‘‘on ac;
count, for design, development and produc-
tion” of an invoice of Digitronics dated
March 31, 1961 which set up total
chargeable production costs per contract of
$158,478.31.

Evidently, at this time, it was recognized
that the Hohmann TIM would not do, and
in late May, Lease of Western Totalizator
Co. undertook to send one of his used TIMs
to Digitronics; he pointed out certain of its
differences from the Digitronics-Hohmann
TIM; these he attributed to the fact that the
circuitry of the Digitronics system required
the TIM sensing unit to be in constant rota-
tion so that the circuit would be open and
waiting for the next operation. He
volunteered the comment that, “Your cir-
cuit, like most electronic circuits, is not like-
ly to be patentable and follows the usual
electronic computer intricacies.”

At the May 26, 1961 directors’ meeting of
Westbury, consideration was given to the
TIM question, the possible availability of
Bell Punch TIMs and the alternative of
using different manufacturers to make the
Hohmann type TIM. At the same meeting,

A49

Westbury considered the question of
producing a totalizator system for testing
and demonstration, and Haight, president
both of Westbury and of Digitronics,
suggested that a 100 window machine (75
regular and 25 daily double windows) be
produced by Digitronics for delivery and in-
stallation at Roosevelt Raceway at the end
of the spring season in 1962 when it could be
vigorously tested and demonstrated to possi-
ble customers. Haight estimated the cost at
$800,000 including TIMs, of which
$200,000 would represent necessary
development costs. Westbury resolved to
place an order for such a First Totalizator
(hereinafter the First Tote), the order for the
TIMs to be delayed for the present. This did
not fit the terms of the agreement of January
31. 1961, which contemplated that the First
Tote would be manufactured and completed
in accordance with Exhibit “‘B’’ (Exhibit
94B). provided the required approval had
been obtained on the basis of the prototype.
Obviously, the First Tote in contemplation
at the May 26 meeting was not the 470 TIM
installation of Exhibit ‘““B” (Exhibit 94B) at-
tached to Exhibit AP which was to cost not
more than $1,500.000 and which was to be
delivered by June 30, 1962 provided the re-

uired approvals had been given, or the
Firs Tote ordered by not later than June 30,
1961.

A50

In the early days of June 1961 Haight
tried to interest NYRA in the electronic
tote. On July 1, 1961 Alvin Weil, in his
capacity as an officer of Westbury, offered to
a French race-track entrepreneur a
prototype demonstration and solicited an
order for electronic aggre ating and related
equipment for parimutuel betting in France
on a large scale, indicating the need for
some developmental time for particular re-
quests that went beyond the prototype, and
stating that “‘At present we are merely
attempting to prove that existing techniques
now utilized in other fields, may be adapted
to the needs of a multiple issuer.”

On July 21, 1961 an employee of
Digitronics furnished to Haight, its presi-
dent and an officer of Westbury, the presen-
tation that the employee had used in seeking
to interest an Italian group in the all-elec-
tronic Totalizator. The presentation stated
that the pone had been produced and
successfully demonstrated, and that the
all-electronic parimutuel system consisted
of a — tote center, TIMs, and infield
display board, and other remote display
boards around the track, and that the tote
center consisted of a scanner, aggregator,
odds computer, payoff computer, tote center
display panel, and printout facilities.

A51

Describing the functioning of the system,
the presentation stated that as wagers are
made at the TIMs, tickets are issued by the
TIMs and that, as each ticket is issued, the
wager data are automatically transmitted to
the tote center (including the amount of the
wager, the number of the horse and the
designated pool). It was stated that at ihe
tote center the data are entered in the
“memory” and checked for accuracy. The
data then enter the aggregator, which ac-
cumulates all transactions, and thence go on
to the odds computer. The computer, it was
said, translated all transactions into dollars
and calculated the probable odds. The odds
computations and totals wagered on each
horse in each pool are then transmitted to
and displayed at the tote center display pan-
el, the infield display board, and remote dis-
play boards around the track. At the same
time, the figures are printed out on paper,
including the totals wagered on each horse
in each category. After each race the payoff
computer calculates the payoff for win,
place and show and the amounts due the
state for tax and to the track for breakage.
The presentation noted that all this was
done electronically, ‘‘and the heart of the
entire system is the tiny magnetic memory
core. It is this tiny element which permits
the computers and other equipment to func-
tion so rapidly, accurately and depen-
dably.” The tote center, it was said, would

A52

cope with scratches, dead heats and other
variables. The TIMs were described as

specifically designed to function with an
all-electronic totalizator and to perform
more functions than their counterparts used
in electromechanical systems. basic

function of the aggregator was described as
being to accept all details of all transactions

from the ‘IIMs, and to reject unacceptable
wagers, for example, an attempted wager on
a scratched entry, interdicting the issuance
by any TIMs of a ticket on a scratch. The
aggregator accepts data from the TIMs,
stores them in the magnetic memory cores,

keeps all data by number of horse,
denomination of wager and win or place or
show pool, and duplicates the records kept
at each sales window by its TIM. The com-
puters make all required calculations in-
cluding odds and daily doubles and payoff
data. Accuracy in transmitting data from
TIM to tote center is assured through use of
a special checking code. Two computers are
used to check every step in each calculation,
with the totals of each computer being
checked against those of the other. Each
computer can also do its computations twice
further to reduce the risk of error, and both
computers have internal checking features.

A53

A little later in July 1961, Auerbach, as
then president of Digitronics, wrote Bell
Punch Co. in London referring to his visit
there in 1960 and to a discussion on that
visit of the application of electronic tech-
niques to building parimutuel equipment.

letter stated that Digitronics had con-
structed a prototype electronic totalizator to
demonstrate the feasibility of digital elec-
tronic technique as an economical solution
to race track problems. Stating that the
prototype system had been demonstrated
seneeaaindiy to many interested groups,
Auerbach said that the company had com-
pleted arrangements to sell its first 100 win-
dow system, that the system was under con-
struction, and that Digitronics was
repared, but indisposed, to make its own
rh Is. Auerbach, therefore, inquired
whether Bell Punch would quote him on
100. 300 and 500 unit quantities of Bell
Punch TIMs with provision for up to 15
runners, plus a second quotation on the
same quantities for only 10 runners or
trotiers.

Meanwhile. Lynch of Roosevelt Raceway
visited Aqueduct on July 28, 1961 to see the
Clary solid state computer, IBM printout
unit, programming arrangement, and con-
trols the calculation procedure there in use.

A54

The equipment was embodied, Lynch said,
in a desk sized console which contained con-
trols for the runners and for odds in connec-
tion with the infield display board. The
Clary computer was being operated for ex-
hibition purposes in parallel with the
original model Burroughs computer; it
differed from the Burroughs in being more
compact and somewhat faster; it had
simpler inputs for the race finish, and the
ability to accept a ‘“‘new call” in place or
show finishes without recalculating the en-
tire finish. Lynch timed the equipment at 1
minute and 25 seconds and at 1 minute and
20 seconds for two finishes; that, he said,
compared with Roosevelt’s best manual
time of 1 minute 15 seconds; however, he
thought that the Aqueduct system had
much better capacity for recalculating when
there was a change in calls. Lynch conclud-
ed that, while not basically much faster than
the best manual showings, the automatic
equipment would be consistently quicker,
not so variable, and would require con-
siderably less personnel, making possible a
savings in payroll of $130.75 a day (plus
fringe emits) for a rental price of about
$110 per day.

Ur der date of August 15, 1961, Westbury
formaily authorized Digitronics to go ahead
with the 100 window First Tote for $800,000
or 130% of production costs, whichever was

A55

lower. The TIM to be used in the system
was to be chosen by Westbury on or before
January 1, 1962.

On October 14, 1961 Alvin Weil for West-
bury answered an inquiry about electronic
equipment by stating that ‘‘the Totalisator
system about which you inquire is In proto-
type and has not as yet been developed for
sale.” The letter continued by saying that
Weil wondered about the inquiry since the
system was an “extremely specialized
system which would be of interest to race
track operators.”

Apparently, Digitronics was having dif-
ficulty arranging for satisfactory TIMs. A
trip was made to Montreal, there to ex-
amine certain TIM equipment, drawings
and tooling of Joly Mfg. Co. The result was
a report that they apparently had neither
the tooling, the drawings, nor the personnel
to do a job of producing Bell Punch type
TIMs. foned on the back of this com-
munication was a note to the effect that Bell
Punch had told Auerbach that Digitronics
would buy Bell Punch TIMs directly from
Amtote, which, apparently, was believed to
control any distribution of Bell Punch TIMs
in the United States. An approach to Am-
tote is reflected in a letter of January 12.
1962 (Exhibit CW) in which Digitronics

A56

acknowledged receipt from Amtote of one
Bell Punch double machine, noted the
absence of certain reject mechanisms from
it, and asked whether it could be purchased
without the wiring and relays but with the
motor, all solenoids, takeoff switches, etc.
and (since it would be without those
wirings) at a reduced price.

Meanwhile, and certainly in advance of
February 27, 1962, when completed copies
of the brochure were mailed out to Kambex
Corporation in New York (Exhibit CX),
Westbury had prepared a brochure entitled
“Westbury Electronic Corp. presents the
world’s first ALL-ELECTRONIC
TOTALIZATOR.” The 14 page booklet
was illustrated with certain pictures of the
prototype taken in June 1961. Among other
things, the pictures showed the Hohmann
TIMs, and four cabinets opened so that
their contents could be seen; the cabinets
were indicated as being, from left to right,
the scanner, the aggregator, the odds com-
puter, and the payoff computer. An elec-
tronic module card was also pictured, one of
the very large number of such cards used in
the Totalizator. Also included were pictures
of the cabinets located at the central control
area closed and partly open. The equipment
was said to be all-electronic parimutuel
system equipment consisting of a complete
tote center, TIMs, an infield tote display

A57

board and other remote display boards
around the track. The tote center was said
to consist of a scanner, aggregator, odds
computer, payoff computer, a tote center
display panel, and printout facilities. In the
all-electronic Totalizator, the brochure
stated, all totalizing and calculating was ac-
complished with pure electronic digital
solid-state equipment with no moving parts.
The elements, it was said, were small and
compact and utilized electronic module
cards, the same as those used in rockets,
satellites, and space vehicles; they offered
compactness, durability and dependability,
virtually never wearing out, according to the
brochure. The brochure stated that
although the all-electronic totalizator per-
formed many more functions than the elec-
tromechanical system, it occupied only 1/3
the space, the use of solid-state electronic
components — such as module cards, diodes,
transistors and magnetic memory cores to
replace large, bulky stepping switches and
other electro-mechanical equipment,
resulting in a much more compact system.
The flow sheet of the system was described
thus: As regular and daily double wagers
are made at the TIMs, tickets are issued;
before a ticket is issued, the transaction is
automatically transmitted to the tote center,
and, only when the wager has been
registered, does the TIM emit the betting

A58

ticket; the data on the wager consist of the
amount of the bet, the horse’s number, and
the win, place or show pool to which the bet
will go; in the tote center the data are
entered into the fully electronic memory and
are checked for accuracy. The data then go
into the aggregator which accumulates all
transactions. [hence the data go to the odds
computer, which translates all transactions
into dollars and calculates the probable
odds, and this information is then
transmitted to and displayed on the tote
center display panel, the infield tote display
board, and the remote display boards
around the track. For pore race, the
brochure continued, there is a continuous
display of the total win, place and show
pools and of the individual horse totals for
each pool, the. display cycling every 70
seconds. Updating takes pi one second
to complete. After the first race, possible
payoffs for the daily double are displayed.
After the TIMs are closed, the information
is printed out on paper, the print-out in-
cluding the number m poked, ste for each
horse in each wager category, the dollar
totals wagered on each horse in each
category, and the number of wagers on each
horse at each TIM. At the end of each race,
the payoff computer calculates the payoff; it
also computes the possible daily double

A59

payoffs, the final daily double port. and
the amounts due to track and state, in-
cluding breakage. All these operations are
done electronically ‘‘and the heart of the en-
tire system is the tiny magnetic memory core.
It is this tiny element which permits the
computers and other equipment to function
so rapidly, accurately and dependably.

The brochure explained that each TIM can,
from the tote center, be redesignated so as to
change it from a window of one denomina-
tion to another, or so as to render it in-
operative. The tote center is also to cope
with scratches, dead heats and other
variables. In the case of a scratch, the tote
center instructs the TIMs not to accept bets
on the scratch. The operation of a single
scratch button will remove the total pool in-
volving that horse from the probable odds
computation or payoff computation. The
brochure continued: each TIM takes slight-
ly more than half a second to report the
details of the wager to the tote center and
issue a ticket to the bettor regardless of how
many wagers are being made. All machines
are scanned four times every second whether
the installation is small, or one of 1,000 win-
dows. The brochure stated: in addition to
reporting transactions to the tote center, a
record is kept of all transactions for each
race, for each TIM for each window, and
that for the regular machines, a counter is

A60

used to record the number of wagers passing
through the machine in each race, and, for
the daily double machines, a perforated
paper tape is punched to record each tran-
saction so that if the entire tote center is
destroyed, wagering can continue, and
records of all transactions can be obtained
from the TIM records to permit hand
calculation of the payoff. The brochure ex-
plained: the basic function of the aggregator
is to accept all the details of all transactions
from the TIMs; it accumulates the number
of wagers in each denomination for each
horse and for each finish-position pool. The
data are subject to a four way check through
the duplex operation where each computer
checks both against itself and against the
other. The aggregator accumulates the
number of wagers for each horse at each
TIM subject to a two way check internal to
itself. The aggregator rejects unacceptable
wagers — for example, a wager sought to be
placed on a scratch — and does not allow
the TIM to issue a ticket on such an
attempted wager. As the aggregator accepts
data from the TIMs, it stores the data in the
magnetic memory cores; in maintaining
these data, it alicome the records kept at
each window by the ticket issuing by the
TIMs. The brochure stated: the basic func-
tion of the computers is to do all of the re-

A61

uired calculations, translating them into
ilies. Totals for all race wagers and
probable odds are calculated instantly with
the probable odds calculation being done
every 70 seconds. After each race, the com-
puters calculate the public payoff within 15
seconds after the order of finish is punched
into the central control units and in the case
of the daily double, in about 10 seconds. Ac-
curacy of transmission of the data from TIM
to tote center is assured through use of a
special checking code, and accuracy of
calculation is assured by using two com-
puters to check each step in calculation, the
results being compared to make sure they
are accurate. In addition, each computer
can do its own calculations twice — further
to reduce the risk of error — and additional
internal checking features are built in. (Ex-
hibit U and Exhibit 120)

At the March 7, 1962 meeting of the
Directors of Digitronics, Auerbach reported
on the Italian totalizator situation; he in-
dicated that preliminary talks pointed to a
10 year contract with a 2% of gross handle
being Westbury’s income.

At the Roosevelt Raceway stockholder’s
meeting of April 17, 1962, Alvin Weil, then
president of Roosevelt Raceway, devoted an
extended part of the cnn, 6 discussion ou!
Digitronics, Westbury Electronic, the

A62

prospects of the use of completely electronic
parimutuel betting at Roosevelt, and ex-
ploitation of the market for such equipment
through Westbury Electronic Corp., in
which Roosevelt was a majority stockholder.
Apparently display cards were used at the
meeting to explain the new tote system, and
Mr. Weil used the familiar statement that
“the heart of this equipment is a little cir-
cular thing that could lie right in the center
of the palm of your hand * * *. This is the
memory, this is — or a number of these, of
course, is what takes together all of this in-
formation, holds it, sorts it and then puts it
out when needed.”

In the latter part of May and the first days
of June 1962, the plans of Digitronics and
Westbury Electronic Corp. took the direc-
tion of completing the First Tote as an in-
stallation - 100 TIM system at Mon-
ticello Raceway about March 15, 1963,
following a demonstration of adequacy at
the Digitronics plant about February 1,
1963. The Monticello installation was to be
utilized as well for taking bets at Vernon
Downs and at Buffalo through some sort of
long lines connection, while the control
center remained at Monticello. That first in-
stallation was to be followed by the comple-
tion of a large installation at Roosevelt
Raceway by March 1, 1964, and the transfer

A63

at that time of the central control and com-
puter units from Monticello to Westbury. It
was visualized that Aqueduct, too, would be
added to the system in March 1964. The
whole program, it was thought, might cost
as much as $4 million, and, if extended to
off-track betting in New York City (provid-
ed such betting was legalized), would also
include facilities for that operation at
another $400,000 of cost. At this point. the
cost estimates assumed Bell Punch TIMs on
the first installation with Westbury Elec-
tronic TIMs to be used thereafter. The am-
bitious program was keyed to approval by
the New York State Racing Commission of
the Westbury Electronic equipment at the
time of the initial demonstration at
Digitronics in February 1963. Haight was in
the course of going to England to negotiate
with Bell Punch for 165 TIMs for use in the
First Tote. To assure Bell Punch of pay-
ment, Westbury Electronic Corp.’s thin
capitalization was to be supported by a
Morgan Guaranty Trust Company
yooescamge backed up by Roosevelt

aceway. (See Exhibits 122, CZ and BE)

In early August the problem of getting
hold of Bell Punch TIMs was still, as a prac-
tical matter, quite unsolved. There was dis-
cussion of maintaining pressure on Amtote
to get Bell Punch TIMs from it, speculation

A64

about the possibility of getting them from
Joseph Lease via Canada, and the possibili-
ty that, at least for the hoped-for Italian in-
stallation, London .- be persuaded to
— Bell Punch TIMs directly for
delivery in Italy, despite the risk that they
might be diverted from Italy to the United
States. By the end of August, however,
—— was in touch with Australian
ote.

Australian Tote indicated a willingness
and ability to supply 190 TIMs by the year
end of 1962, poss iad was interested
in trying to work out some arrangement
with Australian Tote to supply it with elec-
tronic components for its Tins: Australian
Tote seemed to be concerned only with see-
ing to it that Digitronics did not ng | its
devices. At the same time, Australian Tote
indicated that IBM wanted to discuss not
only the design of Australian Tote’s
machines but also the buying of IBM’s TIM
requirements from Australian Tote.

By early September 1962, the planning,
somewhat changed, was tending to be that
final assembly and erection of the First Tote
might be at Roosevelt (rather than Mon-
ticello). Delivery of the First Tote was
scheduled for February 1963.

Still in the early part of September 1962,
the negotiation with Australian Tote was

A65

pressed, and it appeared that a satisfactory
arrangement could be worked out between
Digitronics and Australian Tote, starting
with the loan of one machine to Digitronics,
to be followed by the delivery of two un-
modified machines, all three to be used with
the prototype for test purposes. Beyond
that, the discussion was over ordering 165
additional machines that would be modified
by substituting for their standard “‘selector
arm mechanism” a push-button system and
the addition of a relay and adjustment for
use with 120 volt direct current rather than
50 volt current. It was visualized that the
orders for the Australian Tote TIMs would
fulfill the requirements at Monticello, the
deliveries being staggered between the par-
tial requirements for the February
demonstration and the complete re-
quirements for the March installation,
presumably at Monticello. At the same
time, however, discussions continued with
Joseph Lease for the delivery from Joly Mfg.
Co. in Montreal of 200 regular and 60
quinella TIMs of the Bell Punch type, 148 of
which were said already to have been
assembled for another race track which had
failed to complete the purchase. These were
supposed to be deliverable by the end of
January 1963. Digitronics wondered
whether the person behind the Lease offer

A66

might not be Bell Punch itself, acting
through Lease. In any event, the negotiation
with Australian Tote (which will hereafter
be referred to as Atusa, indicating
Automatic Totalisators (U.S.A.) Ltd.,) was
em ot to the point where, at the end of

eptember, Digitronics and Atusa were dis-
cussing specific contract terms, and
Digitronics was expressing a preference for
the Atusa TIMs over the Hohmann TIMs
which it had worked out with Taller &
Cooper. By October 10, 1962, Westbury,
and presumably Digitronics, were
proceeding on the assumption that Atusa
would make J10 push-button TIMs available
in time for the demonstration in February
1963. One type of J10 apparently could be
switched from regular to daily double bet-
ting very simply, and it was the view that
only 120 machines would be needed, 40 of
these to be converted to and from daily
doubles operation. That circumstance, it
was reckoned, wouid bring the cost of the
Atusa TIMs within the projected budget for
the project.

Amtote, apparently, had becn given some
sort of an order for 152 Bell Punch TIMs,
but it was understood that Amtote had not
unequivocally accepted the order, and
Westbury determined to terminate the order
for all except 13 Bell Punch machines to be
delivered in October 1962. Apparently there

A67

was also under consideration a proposed
development contract with an outside firm
for an on-track and off-track TIM, with, ap-
ey, some expectation that the on-track

IM might be “more important to the
February demonstration than the off-track
devices.”

At length, under the date of October 30,
1962, a letter agreement was signed between
Westbury Electronic and Atusa covering
122 J-10 TIMs ordered for Westbury Elec-
tronic Corp. by Digitronics Corp. at a total
cost of $246,226 FOB Sidney, Australia.
Twenty of the machines were to be shipped
not later than January 15, 1963 and 101
machines were to be shipped not later than
March 31, 1963. The carrier was to be
designated by Westbury (which was, of
course, to pay the freight).

Meanwhile, at the beginning of
November, it was, in light of certain finan-
cing which Digitronics was trying to arrange
for itself, more or less agreed between West-
bury and Digitronics that the January 31,
1961, agreement had become obsolete
because of the later conduct of the parties,
and that they needed a new agreement.
However, without any new agreement, the
parties were working along on the comple-
tion of the First Tote. At a meeting in

A68

Phoenix in late November 1962, held to dis-
cuss technological advances, the contract
between Atusa and Digitronics was disclos-
ed, that the Atusa TIMs were being
modified or adapted to the new Digitronics
tote, and that there would be a complete dis-
play of the Digititronics Tote in mid

ebruary at Roosevelt Raceway, which all
were invited to attend. The representative
from the New York Racing Association
(NYRA) indicated that the meeting had
produced a lot of interesting talk, but
nothing concrete; he stated, however, that if
someone really came forward with
something, NYRA would go anywhere to
inspect it.

In early December 1962, Amtote was
pressing Monticello to renew its Amtote
contract emphasizing Amtote’s im-
provements in its equipment over the years,
including its use of solid-state or tran-
sistorized computer elements, and warning
Monticello that any new device would re-
quire far more testing than non-technical
people appreciated, and that this was par-
ticularly true of equipment intended for
racetrack use because of the sharp contrast
between laboratory or office conditions and
actual operating conditions at a race track.
Amtote closed by giving Monticello until
December 31, 1962 to sign up for a new con-
tract.

A69

About the middle, or a little after the mid-
dle, of December 1962, Amtote delivered to
Westbury through customs, 13 Bell Punch
machines for $20,839, ten of them regular
machines and three of them daily double
machines.

During the year 1962 construction of the
First Tote was progressing under the
superintendence of the patentee, Robert L.
Weida, and in December 1962 it was moved
to Roosevelt Raceway. By February 12,
1963, the work was so far complete that 20
TIMs could be in use and accept bets, odds
could be computed, payouts calculated and
readouts set up visibly. It had already been
decided that the First Tote would be given
an essentially public demonstration on
March 6, 7 and 8 at Roosevelt Raceway.
The demonstration contemplated would,
again, have used 20 TIMs and there appears
to have been little doubt in the minds of the
people at Digitronics that the demonstration
would be successful. For example, in a letter
written on February 12, 1963, to a London
insurance broker, Westbury or Digitronics,
or both, expressed interest in finding out
whether they could offer, with the
Totalizators that they were to market, in-
surance against losses incurred wing
breakdowns in the electronic Totalizator. In

A70

describing the Totalizator, Haight (then
functioning both in Digitronics and in West-
bury Electronic) said that while it was
believed that this first electronic totalizator
would obsolete existing electromechanical
machines, ““* * * there is virtually nothing
in our device which has not already been in-
corporated in other machines which we have
installed for other purposes in such com-
panies as * * *’’— and he named arailway
and three large industrial companies. His
letter continued that, as applied in race
tracks, the electronic Totalizator did repre-
sent a new departure, and hence it seemed a
logical service in advancing the art to
provide, if possible, an insurance policy that
would cover race track owners against loss.

The prototype had, of course, been
demonstrated while it was at Digitronics,
and had been used in the attempts to
promote sales to NYRA and to the Italians;
it was, after it was moved to Roosevelt
Raceway in September 1962, demonstrated
there. However, the demonstration of the
First Tote, which did take place on March
7, 1963, was a spectacular success.

The patent application was prepared
Starting in January 1963 and it was com-
pleted and filed by March 28, 1963. The
draftsman of the application was Camil P.
Spiecens. He made use of the logic diagrams
and of interviews with the various people

A71

concerned in the construction of the First
Tote to get the material for the application
itself and for the figures used in it; the
application was drafted rapidly because it
was anticipated that there might be a sale to
the Italian group and it was imperative that
the patent application be on file in the
United States before any sale was made, for
otherwise, there could have been no filing
for a patent in Italy.

Mr. Spiecens was not told anything about
the prototype, and he did not see it or any

materials connected with it. He was not _

shown the brochure written around the
prototype (Exhibit U), and he did not know
of it. He blocked out the drawings annexed
to the patent application, which became the
figures of the i as issued. They were
not prepared from detailed working
drawings for the equipment itself, but from
plant block diagrams and Mr. Spiecens
worked with the engineers to come up with
block diagrams for the application. Mr.
Spiecens also drafted the response to the
first office action. There was no interview
with the Examiner before the application
was granted. The petition for a certificate to
corrections was not prepared by Mr.
Spiecens.

Spiecens did not see the February 1960

A72

specification of Digitronics for a Fully Elec-
tronic Totalizator, but he did recall that at
some time he saw Figure 1 of “Exhibit A”’
(Ex. 94-A) attached to the “January 31,
1961” agreement, Exhibit AP.

The relation between the prototype and
the First Tote remains most uncertain. Mr.
Weida did not commence to work on the
prototype until after Labor Day in 1960,
and, although it had been powered up and
tried out earlier, as early as late September
1960, perhaps, it was first ‘“demonstrated”’
in mid November 1960. Mr. Weida replaced
Kielsohn on the prototype job (Job No.
4726), and, as found above, when Mr.
Weida took over, the equipment was partly
wired, he was given the logical design
drawings to write up and check, he got the
apparently lengthy logic write-up from
aie. one of the designers, and he talked to
Shaw about it, and — in a word — much of
the construction was already done and the
logic was in hand. Mr. Weida’s job was
simply to follow through to get operability:
the system was complete as a first
go-around.

As it happened, none of the people who
had worked on the prototype before Mr.
Weida took it over worked on the First Tote.
Mr. Weida said that the prototype did not
“interrogate” the TIMs, nor electronically
signal an ‘“‘unlatch”’ for rejection, and that

A73

the prototype had little peripheral equip-
ment. The prototype, he recalled, could not
handle regular and daily double betting
concurrently. The prototype, Mr. Weida
thought. did not have reject signal respon-
sive means, and error detection resulted
simply in shutting the operation down until
the central control started it up again. The
prototype, Mr. Weida said, did not put out
a bid signal and it had no false entry or scan
test.

It is all but impossible to understand how
the prototype could have left so dim and un-
certain an image after it. Mr. Weida was
able to recall that when he took on the job of
finishing the prototype, he got 15 to 20
pages of carbon-copy material respecting
the operation of the logic and about 20 logic
drawings (Tr. 1247-1249), and that he kept
these papers for a year or two but cannot say
where they went thereafter. There were at
least circuit schematic drawings and struc-
tural working drawings of some sort, but
Mr. Weida does not recall having seen the
Exhibit A (Ex. 94-A) annexed to Exhibit
AP. The drawings available to him were in
the drafting room files.

Whatever the differences, Mr. Weida
agreed that Claim 20 of the patent could be
read on a mental reconstruction of the

A74

prototype but for the requirement that it
contain a plurality of TIMs. However, the
evidence warrants the finding and it is
found, that in fact the prototype had been
demonstrated with two Hohmann TIMs in
service, and the simulators, while not
genuinely TINs, would appear from the
point of view of their model or demonstra-
tion roles to qualify as valid models of
“plurality’’; their existence is not otherwise
justifiable. Mr. Weida appeared to agree
that Claim 21 could likewise be read on the
prototype. with the same limitation
presumably.

The great difficulty was that the drawings
for the prototype had completely dis-
appeared, except for one irrelevant drawing,
and disappeared without any satisfactory
and reasonable explanation of their dis-
appearance. A number of drawings related
to Job No. 4726 are listed in Exhibit R but
the evidence was that they were missing
from the drawer in which they would have
been stored. They were uniquely missing;
the absence of the drawings reflected a dis-
continuity in the files.

When the prototype was transferred to
Roosevelt Raceway, a set of the drawings
went with it, and perhaps the originals,
although that is not at all clear; they were
not produced from that source, and perhaps
they were not available from that source.

A75

The prototype itself remained in storage at
Roosevelt ewan , but it appears to be
more or less agreed that the task of trying to
determine from it at this date the circuitry
and capabilities of the device would be enor-
mous because of the multiplicity of com-
ponents and the quantity of circuit wiring in
any such device.

The continuity of conception evinced in
the succession of the May 11, 1959, presen-
tation (Ex.F), the November 1959 outline of
the planned prototype (Ex. 94A), and the
February 1960 specification for the fully
electronic totalizator (Ex.94B); the com-
plete change in personnel assigned to the
completion of the prototype at Labor Day
1960; the disappearance of all drawings and
of all material relating to the logic of the
prototype as the prototype and its logic ex-
isted in incompleteness at Labor Day 1960;
the unexecuted modification of the
Digitronics-Westbury contract of January
31, 1961, which would have eliminated the
‘sale’ and ‘“‘delivery’’ language as applied
to the prototype and preserved it as to the
First Tote; the continuity of conception
evinced from the May 11, 1959, presentation
to the February 1960 specification, and
found in persistence in the Italian presenta-
tion of 1961 (Ex. CX), the brochure of 1962
(Ex. U), and the patent itself (Ex. 1); the

A76

patent solicitor’s | a oo of the existence
of the prototype. of the brochure (Ex. U), or
of the early logic writeup of Shaw; Mr.
Weida’s assent to the idea that, but for the
“plurality” of TIMs point, Claims 20 and
21 could be read on the prototype; these are
circumstances that, notwithstanding the un-
shrinking frankness of Mr. Weida’s
testimony, preclude a finding that the pat-
ent presents a conception of the subject
matter of the claims of the patent that is of
the patentees’ invention.

The named patentees, then, had no role
in the preparation of Exhibits AP, 94A and
94B; none of them had a role in evolving the
design, logic or choice of components of the
Demonstrator or prototype; and only the
named patentee Weida had any part in the
final preparation of the prototype for start-
up and demonstration; the contributions of
the named patentee Weida to the prototype
were at best corrective of blunders in logic
detail or implementation and did not either
change the controlling logical schemata of
the prototype or the plan of tangible em-
bodiment that his predecessors on the proj-
ect had developed; plaintiff is solely respon-
sible for the substantively unexplained
failure to preserve and produce any block
diagrams, circuit diagrams or detailed
drawings of the prototype or any exegesis of

A77

its logic; and the patent solicitor who
drafted the patent specification, claims and
the single response to the first office action
had no access to those responsible for Ex-
hibits 94A and 94B and for the design, the
logic and the supervision of construction of
the prototype, did not see the prototype or
any demonstration of its operation, did not
learn of Exhibit 94A of November 1959 nor
of Exhibit 94B of February 1960 (although
the latter was directly related to the First
Totalisator which was the subject of the pat-
ent application he was a and did
not know of the printed and published sales
brochure of March 1962, Exhibits U, 120
(although a hoped-for Italian sale oc-
casioned the hurried ch gape of the pat-
ent application on which he was engaged).
The testimony of the named patentee Weida
leaves no doubt that Claims 20-22 read on
the prototype and that the attempt to dis-
tinguish the claims made at the trial as not
speaking to a plurality of TIMs (Tr.
1814-1893) is wholly unsubstantial. Denied
access to everything except the First
Totalisator and to those persons named in
the patent as patentees, the draftsman of the
patent specification and claims had not the
means to and did not disclose to the Patent
Office examiner or refer in the patent
application to the prototype or the publish-
ed advertising brochure.

A78

Inevitably, the prototype or demonstrator
is prior art of other inventors against the
pen in suit. It cannot be said that a cura-

le omission of joint patentees is all that is
present; 35 U.S.C. 116, 256 countenances no
such procedure. The named patentee Weida
cannot be treated as a joint inventor both of
the prototype and of whatever, if any, im-
provement on the prototype may have been
represented in the disclosure of the patent in
suit and embodied in the First Totalisator.
Rival Mfg. Co. v. Dazey Products., W.D.
Mo. 1973, 358 F.Supp. 91, 102, 177 USPQ
432, 440. It is no answer to point out the fact
that ali the Digitronics personnel involved
had alike signed agreements entitling
Digitronics to claim from them assignments
of their patents and patent rights growing
out of their work for or related to the
business of Digitronics.

The prototype was repeatedly and
successfully demonstrated more than a year
before the patent application was filed. It
was delivered to Roosevelt Raceway in 1962
and has since remained there, and the costs
of its manufacture were paid for by West-
bury. However, the demonstrator or
prototype was not practically operable as a
racetrack totalisator; it was a demonstrator
only; not a toy, not a model; it was a full

A79

scale demonstrator and it was meant to be
used and was used first as a demonstration
to Roosevelt Raceway and, later, as a
demonstrator for Westbury in its sales ef-
forts; it had been hoped it might be used to
get state approval of the full sized totalisator
of Exhibit 94B (Exhibit AP, Exhibit B), but
that was not accomplished. But neither such
“sale’’ as there was of the prototype (and
nothing turns on the inept effort to rewrite
the contract, Exhibit AP), nor such use as
was made of the prototype as a
demonstrator, reached the disabling level
that 35 U.S.C. 102 marks as being “in
public use or on sale in this country.” The
sale was not on commercial terms for the ul-
timate use to which the projected finished
product would be devoted, nor was the use,
if public, a use of the article of the patent
rather than a use of an illustrative but com-
mercially incompetent prototype of the arti-
cle of the patent, and it was not a use for the
purposes to be served by the article of the
patent but a use in order to demonstrate the
validity of the scheme of the article of the
atent. Cf. Cali v. Eastern Airlines, Inc., 2d
ir. 1971, 442 F.2d 65, 70-71, 169 USPQ
753, 756-758; In re Yarn Processing Patent
Validity Litigation, 5th Cir. 1974, 498 F.2d
271, 277, 282-285, 183 USPQ 65, 72-75;
ack Winter, Inc. v. Koratron Co. Inc.,
..D.Cal. 1974, 375 F.Supp. 1, 37, 181
USPQ 353, 373-374.

A80

ef

The printed and published brochure,
Exhibit U, has a two-fold importance. First,
within Section 102(b) it is beyond question
a printed publication in this country; if it
discloses an invention. whether that of the

atentees or that of Shaw and Kielsohn,
that is final: it is either (or both) prior art
against the patent (Section 102(a)), ora dis-
abling printed publication (Section 102(b)).
Second, it relates, — with Exhibit 94B, to
the sale of the First
relation to the prototype, viewed as a reduc-
tion to practice of the invention of the patent
(although it is rather a reduction to practice
of the invention of Shaw and Kielsohn. the

redecessors of Weida, et al.), relates to the
idea that there can be a sale of future goods
that is disabling under Section 102(b) if the
article is one that in ordinary trade would be
sold as future goods to be built and if. at the
time of contracting, it is sufficiently defined.
provided, at minimum. it has been reduced
to practice in some reliable, complete
manifestation. Can it fairly be said that the
First Totalisator was on sale a year before
the filing of the patent application drawn
from the First Totalisator as it was com-
pleted and before it was publicly
demonstrated? Cf. Jack Winter, Inc. v.

A81

Otalisator.-and, by its - —

Koratron Co., Inc., supra, 375 F.Supp. at
37, 183 US at 72-75; Kalvar Corp. v.
Xidex Corp., N.D.Cal. 1973, 384 F.Supp.
1126, 1130-1138, 182 USPQ 533, 535-542;
Philco Corp. v. Admiral Corp., D.Del. 1961,
199 F.Supp. 797, 814-818, 131 USPQ 413.
Contrast Burke Electric Co. v. Independent
Pneumatic Tool Co., 2d Cir. 1916, 232 Fed.
145, 146-147, 234 Fed. 93. Robbins Co. v.
Lawrence Mfg. Co. 9th Cir. 1973, 482 F.2d
426, 431-433, 178 USPQ 577, 580-581 may
be taken to suggest that in the case of a sale
of future goods to be built to specification,
where there is no fully operative device in
existence, a finding that the article of the pat-
ent had been put on public sale could rarely
be warranted. The history of the ‘“‘sale”’ of
the First Totalisator does not reach any of
the uncertain benchmarks that the cases
seem to limn. Roosevelt Raceway’s
shilly-shallying, the cutback in scale, the
grouping for cost savings and for a ceiling on
costs that kept running out of hand, these
fluid factors combine to preclude a finding
that there was an August 1961 contract to
sell the First Totalisator as an article com-
plete in design, specification and detailed
drawings and adequately exemplified as a
feasible device by the prototype. Without
such a finding, it cannot be held that there
was a disabling contract to sell within the
meaning of 35 U.S.C. 102(b).

A82

Il

Untangling the patent from the bramble
of unfamiliar terminology is not very easy,
but the 25 day trial illuminated the dar-
ker corners and, it is believed, made
possible a reliably simple explanation of
the teaching of the patent against the
background of the prior art. Analysis
leads inevitably to the conclusion that
the claims of the patent now in suit,
claims 20 through 27, are not valid claims.

Yo start at the beginning, data proces-
Sing, whether mechanical, electromechani-
cal, electronic, or solid state electronic,
takes advantage of the facts that numbers
can be reduced from decimal or whatever
other number base is used to binary nota-
tion in which the only digits are zero and
1, and that the steps or stages of mathe-
matical reasoning can be starkly expressed
in algebraic form, not so far removed as
might at first seem from Aristotle's use
of letters in, for example, the Prior and
the Posterior Analytics. As will be seen,
the patent refers to a Boolean equations
(Columns 11-15); the reference is to George
Boole and to his epochal alegebra of clas-
ses. In his book, An Investigation of the
Laws of Thought, on which are founded the
mathematical Theories of Logic and Proba-
bilities, he says:

"Hence, instead of determining the
measure of formal agreement of
the symbols of Logic with those
of Number generally, it is more
immediately suggested to us to
compare them with the symbols of
quantitiy admitting only of the
values 0 and 1. Let us conceive,

A83

then, of an Alegebra in which
the symbols x, y z, &C. admit
indifferently of the values of
0 and 1, and of these values
alone. The laws, the axioms,
and the processes, of such an
Algebra will be identical in
their whole extent with the
laws, the axioms, and the pro-
cesses of an Alegebra of Logic.
difference of interpretation
will alone divide the." (Boole,
The Laws of Thought, Dover Re-
print of the 1854 edition, pages
37-38.)

According to tradition (see Exhibit K)
it was in 1938 that C.E. Shannon demon-
strated that a Boolean algebra could be
adapted to the presentation of data pro-
cessing circuitry, and could be used in
evolving and simplyfying data processing
circuitry. The principles of the Boolean
algebra involved turn on the limitation
of values to 0 and l, the recognition
that the Boolean algebra involved is
essentially an algebra of classes, and the
fact that a system limited to the values
0 and 1 could nevertheless also be used
for limitless enumeration as the digits
of a binary (or base 2) system of numbers.
In Boolean algebra as a logical system
the rules of operation take an unusual
form (as explained in Exhibit K, Chapter
2 of Richards, Arithmetical Operations in
Digital Computers). The familiar plus
sign has the meaning of “or"; the multi-
plication sign (indicated by the x, the
dot, or simply by writing two letters
close together without punctuation or
separation) has the meaning of "and"; with
the logical reading that 0 plus 0 equals
0, as always; 0 plus 1 equal 1, as always;

A84

ad

and 1 plus 1 equals 1, because, in the
logic of this Boolean algebra, the ex-
pression means that 1 or 1 equals l, or,
to put it another way, it states that

if there is a class of 2 members either
or both having a certain defining charac-
teristic, then a statement that one or
the other or both members of the class
have the defining characteristic is true,
otherwise it is not. Mr. Weida (one of
the patentees) in Exhibit 149 put the
ideas of this arithmetic in essentially
truth table form; using instead of 1 and
0, or "true" and "false," 1 volt and 5
volts where 5 volts represented the crit-
ical voltage required in the circuit,

he essentially was using truth table
analysis of what is meant by disjunction.
That is, treating the plus sign as the
sign of dijunction, then A plus B equals
C would yield the following truth table:

A or Vv + B or Vv = €C or V
F fe) F O F 0
T 5 F O T 5
F 0 T 5 T 5
T 5 T 5 T 5

In Figures 2, 3 and 4 of the patent,
Exhibit 1 and in the specification, if it
is intended to show or state that two
input wires are to energize a third wire
beyond a certain gating point if either
or both of the input wires bears a signal
at the critical voltage level but not
otherwise, the input wires are shown en-
tering a square labelled "0" (the symbol

A85

for an "or" gate) and one wire is shown
emerging from that gate. The circuitry
Significance is that if either or both
input wires are energized to the critical
voltage level, then the "or" gate will
permit the energization of the efferent
wire; it will interdict energization of
the emerging wire if, but only if, neither
of the input wires is energized to the
critical voltage. In the figures of the
patent, conspicuously figures 3 and 4, the
"or" gates are numbered as well as iden-
tified as "or" gates by the letter 0. So
in figure 3 at the very top towards the
center will be seen a square box with the
identification 01. It is illustrated
with four input wires along which signals
could proceed. In the logic of the device
that means that if any one or all of the
inputs to the "or" gate "01" is energized,
it will send an energizing signal to the
next component, in this case the step
pulse generator. Other "or" gates will

be seen in figure 3, conspicuously, "or"
gate "03" at the lower left which has

five input and one efferent wire, again
signifying that if any one or more or

all of the input wires carries energy at
the critical voltage level then the
efferent wire will be energized.

In the Boolean algebra of this cir-
cuitry the multiplication sign is identi-
fied as “and," with the immediate Boolean
algebraic significance that 0 times 0
equals 0, 0 times 1 equals 0, and 1 times
l equals 1. The multiplication, or "and,
function in the Boolean algebra of com-
puters means that if, and only if, all of
the inputs are 1 will the output of the
"and" gate be 1. Mr Weida illustrated
this in exhibit 149, and, again, extended

A86

the form of the truth table to gather in
the “and" gate function. Put in true/
false truth table form, and in parellel
with A times B equal C, the table would
be as follows:

A or V X¥ B or V #® C or V
F 0 F 0 F 0
T 5 F 0 F 0
F 0 T 5 F 0
T 5 T 5 T 5

Referring to figures 3 and 4 of the
patent, Exhibit 1, the "and" gates will
be seen to be those which are identified
by an "A" followed by a numeral inside a
square. In figure 3 at the upper left
hand corner is "and" gate 1. It is shown
with two input and one efferent signal
wire and has the effect that if, and only
if, both input wires are energized to the
critical voltage will the "and" gate ener-
gize the output wire leading to the next
gate, which is “or" gate 1, mentioned
above. In figure 4 at the extreme left
and near the top of the figure will be
seen "and" gates A8 and A9, each shown
with three input wires and one output
wire. The significance in each case is
that if, and only if, all three input
wires are appropriately energized will
the output wire leading to the "or" gate
05 be energized. It will be seen here
that “or" gate 05, which receives its
input from "and" gates 8 and 9, will ener-
gize its output wire if the gate's input
is energized from either or both of "and"
gates A8 and A9. (It will be noticed that

A87

all the signals shown as entering A8

have a capital A in their identification.
This reflects the fact that, as figures
1A and 1B illustrate, the system of the
patent has duplicate units identified as
A and B.) The sense of the A8, A9, 05
gating is that if either the A or the B
side is energized at the required level,
or both sides are so energized, the "or"
gate 05 will send a signal to "and" gate
Al0O, which in turn, will emit signal

SCNI if, and only if, it receives signals
from all of "or" gate 05, “flip-flop”
CONA, and "or" gate 017. Only if neither
the A side nor the B side signals are
sufficient to energize their respective
"and" gates A8 and A9 will "or" gate 05
fail to send on a signal to "and" gate
Alo.

The logic of the Boolean algebra em-
ployed contains the idea of negation with
the necessary consequence that the nega-
tion of 0 is 1 and the negation of 1 is 0,
Since they are the only digits or values
used in the symbology. The negation of
any variable is indicated by putting a
bar over it or using a prime mark to the
right of the letter or letters identifying
the variable. In the specification of the
patent the prime mark is used. The logical
principle of the Boolean algebra that
1 + 0 = 1 requires the conclusion that,
using A as the variable, A plus A‘ equals
1. Similarly, A times A‘ equals 0, since,
as above, 1X 0= 0. And, finally, A" = A.
That is, a negation of a negation is’ the
equivalent of an assertion, and this will
be true whether A is 0 or 1, since the
negation of 0 is 1 and the double negation
of 0 is 0 and the negation of 1 is 0 and
the double negation of 1 is 1. The

A88

negation function is employed in computer
algebra and is illustrated in the circuit-
ry of the patent by a square box in which
there is a letter I, meaning inverter,
followed by a number. The effect of the
inverter is that if the input is a critic-
ally, positive voltage, then the output
negates the functional significance of
that critical input voltage. More gener-
ally if the input is 1 then, for circuit
purposes, the output is 0, and vice versa.
The negation function is illustrated in
figure 3 of the patent at the upper left
as square boxes 1l and 12.

The specification repeatedly refers to
flip-flops, best seen at the right side
of figure 3; the five large squares each
with a "0" near the top and a "1" near
the bottom, and with identifying letters
"TFBF," etc., inscribed in the middle of
the box, are flip-flops. In the middle
lower left of figure 3 there is a box
that has inside it the identification
"ERAF"; it is a flip-flop, but, apparently
through error, the 1 was not inscribed in
it.

The flip-flop function is explained at
pages 47-49 of Exhibit K. Very broadly
it is a "bistable" function which has the
capacity to store a 0 or al until it re-
ceives a new pulse (of appropriate volt-
age) which changes its state to the oppo-
Site. That is, if it is in 0 stable state,
the impulse will change it to l, and if
it is in the stable state 1, the impulse
will change it to the stable state 0.

Finally, in the figures of the patent,
Exhibit 1, there appear a number of "delay"
units symbolized by a square box in which
there is a letter D together with an

A89

identifying number. One such is shown
in figure 3, at the bottom center, as

D4. Two other delay units will be seen
higher up in figure 3 just below the mid-
line; others will be seen at the right
of the figure.

The specification and figures of the
patent are largely written in the lan-
guage and using the symbols exhibited and
discussed in Exhibits K, M, N and L, all
excerpts from Richards, Arithmetic Opera-
tions in Digital Computers, which is re-
ferred to in the patent at column 12,
lines 3 to 5, lines 10 through 21 and lines
32 through 36; at column 13, lines 53 to
56; and at column 15, lines 26 to 3l and
lines 58 through 60. It will be seen
particularly in Exhibit K that Richards,

a 1955 publication, conducts much of the
discussion in terms of the logical dia-
grams without reference to the particular
means of performing the logical function,
and that he explains their use with either
solid state diodes, or vacuum tubes, or
electromechanical relays.

Two other preliminary matters are needed
for a good reading of the patent. The
patent repeatedly refers to memory, and
memory is manifestly a basic part of data
computing and solid state electronic data
processing. The individual building
block of the memory or core memory is a
tiny toroid or anulus which can be polar-
ized, in the sense of establishing the
direction around the periphery of its mag-
nectic field, either in a clockwise or
counterclockwise direction; it can maintain
the direction of polarity of its magnetic
state until the polarity is reversed by a
fresh impress of current upon it. The

A90

toroids used in the memories here involved
are apparently 1/16 inch or less in out-
side diameter and can each store only one
"bit" or information datum, since they
have only two states, counterclockwise

and clockwise magnetic fields. AS the
system is aimed at the use of a binary
logic, inevitably the two states are read
as one and zero. A memory core to be use-
ful, then, must have a very large number
of toroids in it, and, since each one of
them has only the capacity to represent
either al or 0 that is either a part of

a binary number or part of some numeric-
ally encoded information that is in stor-
age, Or is being brought out of or re-
stored to storage, it must be locateable
and accessible. In the language of the
patent and the art, it must have an
address. Physically, the memory may be
a cube or other rectangular solid in
which the toroids are stacked like poker
chips in row and column. A memory might
measure 64x64x25 toroids, each at a fixed
and permanent location in the memory, and
each individually accessible to wire con-
veyed impulses that impress on it a clock-
wise or counterclockwise magnetic field,
and, therefore, a 1 or 0 significance.

To determine, and by determining to "read
out," its 1 or 0 meaning, a current is
applied to it which will alter its polar-
ity of manetization (and in so doing emit
an output signal) if it is in one state
but not if it is in the other state, thus
extracting its "bit" of information from
it. For whatever purpose, that bit has
been retrieved. See Exhibits 13 and BN,
BO and BP. Since every such bit will have
been "read out” from and restored to an
identifiable location on a specific mag-
netic toroid in the same or altered state,

A91

a change of its state between pre-read-
out and post~-restoration, from 1 to 0

or 0 to l, reflects the alteration of the
binary number-place which it represents;
that is, it reflects an addition or sub-
traction. For example, if a toroid re-
presented the first number-place at the
right end of a binary number, and had
been 0, and upon restoration, it is l,
then it will be plain that one wager (or
whatever) has been added to the "word"

in the memory of which that toroid's

bit of information formed a part. The
same thing will be true whether the posi-
tion of the toroid is at the extreme
right number-place or any of the other
number-places along the row of a binary
number. It will reflect either a change
in the quantity represented by that num-
ber-place or a retention of it, for not
every addition to a binary number changes
the state of every number-place in the
number. The number 101 is binary nota-
tion, when it has one added to it, be-
comes 110, the number-plave at the left
remaining unchanged. In the memory illus-
trated in Exhibit 13, the “words" stored
are represented by stacks of 25 toroids,
a "long" enough word to accomodate a very
large number together with keying data
necessary to the effective handling and
processing of the number.

Sections of the memory can also store,
coded in binary numerical form, instruc-
tions to govern the steps in the function-
ing of the device, so that no human oper-
ator is needed to take the results of one
step in the process and set in motion the
next operation, as is required with calcu-
lators. The stored instructions are drawn
from the memory and entrained with the data

A92

being processed so that they can perform
their roles as active signals operating

on the data through the circuitry provided
in the device.

As Exhibit 13 illustrates, each magnet-
ic toroid is reached for its bit of in-
formation by being found at the intersec-
tion of two wires which traverse its open
center. Advantage is taken of the fact
that each magnetic core toroid can be
magnetized to saturation so that added
current in the same sense will not change
its magnetic polarization, and that if it
has one polarity, it will take a critical
amount of current to switch its polarity
reading from 1 to 0 or from 0 to l.

Since it takes an intersection of two
wires to locate the toroid in the memory,
less than the critical current is applied
on each of the "select" wires that range
the memory from two directions to inter-
sect at the toroid. Since neither wire
has the critical amount of current on it,
they will not change the state of any of
the toroids they traverse until they meet
at the toroid of choice; there the union
of the two less than critical currents,
summing to a more than critical current,
will change the polarity of the toroid if
it is opposite to that of the select cur-
rents or leave it unchanged if it is of
the same polarity. The change in polarity
is read out on a sense wire as a wave form
pulse, leaving the core toroid bereft, but
receptive to restoration of the same or a
different magnetic polarity after the oper-
ation is complete. The read-out of a pulse
or of no pulse is, of course, equally com-
municative of the toroid's stored bit of
information.

A93

Such a read-out is "destructive."
To restore the "word" to its "address"
in the same or altered form requires the
regeneration of the location by fresh
Signals.

A second aspect of the reading of the
patent involves the interpretation of the
lines drawn on the figures and the progess
of signals from one to another place.
Signals, that is, data communicating sig-
nals which will communicate 1 or 0 from
one point. another can, evidently, be
a sequence of timed electronic events
speeding along a single wire, or the sig-
nals can proceed along parallel wires,
and, plainly, the latter is, in a sub-
world of blindingly fast travel, much
quicker, since all the data are communi-
cated in the lapse of time required for
communicating a single impulse. Hence,
while most if not all of the wired con-
nections in the figures of the patent are
shown as single wires, that is schematic.
In many cases the single wire is really a
bundle of distinct strands each capable
of transferring one bit simultaneously
with the transfer of other bits on other
strands of the same "wire."

As stated above, the patent is not easy
to read and the reading is complicated by
the fact that the specification is written
around the daily double capability of the
system and its use substantially through-
out of duplicate components and duplicate

processing of the critical signals, neither

of which aspects of the patent is involved
in claims 20 through 27, the only claims
here involved. Plaintiff introduced the
case by having the first named patentee,
Robert L. Weida, testifying as an expert,

A94

explain the system from the patent's
summary, and then take a wagering trans-
action through the system. That involved
something more and different from what

he did later in applying claims 20 to 27
to the figures of the patent to show the
Significance of the means specified in

each of the claims and how they functioned.

These approaches require a reading of the
specification of the patent, and the
reading becomes important in part because
of plaintiff's reliance on so much of Sec-
tion 112 of the Patent Law as provides
that

"An element in a claim for
a combination may be expressed
as a means or step for perform-
ing a specified function with-
out the recital of structure,
material, or acts in support
thereof, and such claim shall
be construed to cover the
corresponding structure, mater-
ial, or acts described in the
specification and equivalents
thereof."

In an effort to make the specification
more readable, sketches of the figures of
the patent (Annex B, C and D) have been
prepared which, so far as is possible,
are restricted to the matter necessary to
the reading of the claims in issue and
can yet indicate the working of the whole
system as a "simplex" rather than a "dup-
lex" system, eliminating daily-double
circuitry where possible.

Annexes B through D present versions

of the Figures of the patent (1A, 1B, 2,
3, and 4) from which have been eliminated

A95

the "B" elements, those elements limited
in their use to the dual aspect of the
system or to daily double betting, and
elements not germane to the claims, and
Annex A presents a versions of a block
diagram showing, in the main, the com-
ponents germane to the claims in a form
that seeks to stay close in usage to the
Figures of the patent.

IIl

The patent is entitled a patent ona
"Data Processing System" and each of the
claims in suit is a claim upon a "system
comprising" a plurality of TIMs or a TIM
followed by a combination of particular
means. The specification then continues
- and so much of it is paraphrased as
relates to the claims and is needed to
explain the role of the matter covered
by the claims:

The invention pertains to data pro-
cessing systems and more particularly to
systems for processing data received from
TIMs, one of the commonest of which is a
parimutuel system for servicing wagers on
sporting events. Existing systems are
Slow operating, of only average reliabil-
ity, are dependent on must human assist-
ance and have limited versatility. Such
systems, however, can neither tolerate
down time during the wagering nor errors
in processing wagers. A general object
of one aspect of the invention relates to
down time and reliability.

Downtime and reliability aspect: A
data processor is provided for processing
transactions having a plurality of pairs
of units, each unit duplicating the func-
tion of the other, but one being the master

A96

and the other the slave unit. Disregard-
ing the pairing aspect, checking means

are included in each separate unit for
checking for erroneous transaction sig-
nals so as to transmit an erroneous-trans-
action indicating signal to the master
selecting means. The invention includes
various checking means for detecting
erroneous transaction signals, for deacti-
vating the data processor when the check-
ing means in both paired units detect
erroneous transaction signals in them,

and for rendering ineffective the unit
which detected erroneous transaction sig-
nals. A general object of another aspect
of the invention is to provide a high
speed scanning means for interrogating a
plurality of relatively slow operating
TIMs for transactions.

High speed scanning aspect: Scanning
means are atoviaed tor sequentially and
peroidically selecting each TIM for inter-
rogation. Interrogating means transmit

an interrogation signal to the selected
TIM. If the selected TIM is prepared to
make a transaction, it will transmit a
selected transaction signal. Means sense
for transmission of the selected trans-
action signal which, if not sensed, causes
the scanning means immediately to step to
another TIM for interrogation of it.

A feature of this aspect of invention
insures that succeeding attempted inter-
rogations by the scanning means of a TIM
which has had its transaction either con-
firmed or rejected do not cause the trans-
mission of redundant selected transaction
Signals.

Daily-double etc. versatility: An ob-
ject of another aspect of the invention

A97

is to provide a more versatile system by
providing for processing sequential
multi-entry transactions such as daily
double wagers.

The system includes a plurality of
TIMs which accept transactions on entries
in a horse race (for example). The trans-
actions are operated upon by a data pro-
cessor. The data processor includes
common units such as a Console, a Scanner,
Buffers la to NA (there being one buffer
for each horse running in the race), a
transaction processor MRA (all seen in
Fig. 1-A) and a transaction calculator
TCA seen enclosed in dotted lines at the
lower left of Figure 1B. The transaction
calculator TCA includes a plurality of
registers (MEM A), a portion of which are
aggregator registers; aggregated trans-
action updating means (UAA); a computer
(COMA); ("Error Unit" ERCA) and an acknow-
ledge unit (AKA).

The system of the patent is described
operating in the dual mode with the A
Side as the master. The left hand units
in Figures 1A and 1B have reference char-
acters ending in the letter A. To para-
phrase the patent in its simplex mode,
using the A side, requires some references
to the A master signal means and signals.

A switch in the console C will generate
the AMST and AMSTC signals fed respect-
ively to the transaction processor MRA and
the transaction calculator TCA, indicating
that they are the masters. The AMST sig-
nal is fed also to all the interfaces IFl
to IFN (there being an interface for each
TIM) so that scanner SCA will control the
sequential and periodic interrogation of
the TIMs from TIM 1 to TIM N. The

A98

transaction processor MRA will process a
transaction, that is, it will check for
erroneous transactions and other inter-
nally generated errors, and generate
storage addresses for the memory positions
in the TIM memory (WM, Fig. 1-B), the
contents of which are to be updated, and
also the addresses of the aggregator re-
gisters in the transaction calculator TCA,
the contents of which (the aggregated
transactions) are to be updated. The
transaction information processed from
the transaction processor MRA is fed to
the transaction calculatcr TCA. The
transaction calculator TCA operates on
the processed transaction information to
calcualte odds, pools, payoffs and simi-
lar information.

All units are connected by signal lines
which transfer signals between the units.
Signal lines bear the same reference char-
acters as the signals on the lines, and
this terminology is used interchangeably.
Mention of the signal, the, implies the
Signal line, and vice versa. Furthermore,
some signais are shown in a single line
for convenience sake, but they are in fact
a plurality of lines in a cable. The
lines AADR, WADR, MOA, MIA, SKNA and SKRN
are typical examples. Moreover, the lines
shown indicate only one polarity of the
Signal line in some instances a parallel
line carries the opposite polarity of the
Signal, indicated as BID1'(the prime mark
being used to represent a negation often
indicated by a bar over each letter being
negated).

Switches on the console C determines
which side (A or B) is master. Console
Switches also initially clear the system
(by dispatching the ICL signal) through
momentarily depressing the "initial clear"

A99

switch SIC, and console switches also
indicate the entries (horses) upon which
no transactions will be allowed
("scratches") by positioning the "non-
transaction" switches SKWN which generate
the associated non-transaction signals
SKRN.

The console also includes a three-
position mode switch SFS which, when in
the "D" position, indicate the dual mode,
when in the "A" position, causes the
generation of the FSA signal indicating
the simplex mode with "A" the master,
and when in the "B" position, generates
the FSB signal indicating simplex mode
with "B" the master.

The AMST signal fed to the interfaces
IFl ... IFN (and there is an interface
for each TIM) sensitizes these units to
interrogating signals such as the SCNNA
Signal from the scanner SCA (see Annex
B). The AMST signal fed to the trans-
action processor MRA insures that storage
address signals are fed only from the
transaction processor MRA to register
MEMA and TIM memory WM (probably "WM"
means “Window Memory," that is TIM mem-
ory). Similarly, the AMSTC signal fed to
the transaction calculator TCA insures
that only its data are fed to the output
line (OUA).

The ICL signal fed to the transaction
processor MRA presents to its initial
count of one the scan counter SKA, which
is a typical chaim of conventional cas-

caded binary counters in which each binary

counter has an output both from its "1"
and "0" sides, (Annex C, extreme right,
lower half of page). The output of scan

counter SKA is fed as the SKNA signal from

transaction processor MRA to the scanner

A100

SCA, which is a typical decoder which
decodes the combinations of "ls" and

"Os" from scan counter SKA. The SKNA
signal is decoded by the scanner SCA

and becomes the SCNNA signal which goes
only to interface IFN, the interface of
TIM N (see Annex B). If TIM N wishes to
make a transaction, then one of its
transaction keys will have been depressed
and IDN signals will be received by the
interface IFN, but will have no effect
unless and until the scan is at TIM N for
interrogation.

When the scan is ready to interrogate
TIM N for the wagering transaction, the
SCNNA signal passes (via IFN) to TIM N
as an SCNN signal, which is fed to the
common side of all the transaction-selec-
tion switches of TIM N (see Annex B,

Annex D). This signal will pass through

to the other side of the closed trans-
action-selection switch and be fed out

as a selected-transaction HIN signal to
buffer 1A (see Annex B: the 1 in the
Signal designation HIN and in the buffer
designation 1A indicates the horse, or
"entry," numbered "1." No matter how many
TIMs there are, and the TIMs are thought

of as being an indefintely large set,

TIM 1, TIM 2, ... TIM n, all wagers on
starting horse No. 1 will feed from the

N TIMs to buffer 1, all wagers on horse

No. 2 will feed to buffer 2, and so on
through the N starting horses; the start-
ing gate capacity sets the maximum number
of horses that can contest any race.)

For example, if the entry is being inserted
as a wager on horse 1 (see Exhibits ll, 14
and 15), entry key 1 of the TIM N would
have been depressed, causing the associated
transaction-selection switch to close and
latch, and an HIN signal would feed through

Al0l

buffer 1A to become the particular entry
HIA signal fed to transaction processor
MRA (See Annex B). The HIA signal is
stored in the entry register 1 HRA in the
transaction processor MRA (see Annex C).

At the same time, Control KA (see
Annex B, C; KA is in the transaction pro-
cessor MRA) transmits a test-for-trans-
action-made TFB signal, generated by
flip-flop TFBF (Fig. 3, upper right), to
probe the transaction-made unit BMA (An-
nex C, lower half). (The lettering
signifies "TFB" - test for bet signal;
"TFBF" - test for bet flip-flop; and
"BMA" - bet made unit. The A indicates,
again, the A side of the dual system.

The F at the end of TFBF is the indicator
of a flip-flop, seen best in Fig. 3 at

the fight where the large squares, arranged
one above the other, are all flip-flops.
Similarly, in Annex C, upper half, the
bottom row of symbols includes flip-flops
ERAF and REJF. In Annex D are seen the
flip-flops CONAF and REJAF.) If a trans-
action has been made, as indicated by the
presence of a signal on one (and ideally
one only) of the HI1A to HNA lines from

one of the buffers 1A to NA, a BMD signal
is fed back to control KA from BMA to
start an error-test routine. If no BMD
Signal is fed back, control KA generates

a STEP signal to scan counter SKA (Annex
C, lower half) which steps to the count

of n + 1 to initiate the transaction-in-
terrogation of the next TIM in sequence.
Note that the HI1A signal (of HNA signal,
as the case may be) results from the SCNN
Signal's passing through a latched trans-
action switch, and, if this switch was

not latched, the STEP signal was generated.
Therefore, this is the method for stepping

over TIMs which are not ready with a trans-

action.

A102

If, however, a transaction-selection
switch is latched, and, therefore, one
of the H1A to HNA signals is present, it
causes a BMD signal to go to control KA,
and, as noted just above, an error-test
routine starts. The presence of the
BMD signal at an input of "and" unit A2
(Fig. 3, upper right) passes a pulse to
the “set to 1" input terminal of flip-
flop TFTF ("test-for-two" flip-flop),
which generates the TFT signal and simul-
taneously passes the pulse to the "set
to 0" terminal of flip-flop TFBF. The
first test of the error-test routine
after the test-for-bet-made process step
is a two-entry transaction test; that is,
a test is made to insure that the signals
from entry register 1HRA (Annex C,lower
half) indicate that only one entry is
stored in it. The error risks are that
e.g., TIM N faultily transmitted both
HIN and HNN signals (see Ex. 16) simul-
taneously (i.e., one $2 wager on two
horses in the same race), or that through
a failure in the buffers LA and NA both
wagers in a daily-double transaction are
transmitted to the first-race entry re-
gister, l1HRA (in transaction processor
MRA, Annex C). In such case, the two
entry transaction test unit THBA (Annex
C, lower half) will reply with a THBI
(two horses bet input) signal in response
to the TFT (test for two) signal from
control unit KA (Fig. 3). If that is the
case, control KA, sets the error flip-
flop ERAF (annex C, upper half) generating
the ERA signal and generates the REJA sig-
nal (Annex C, Ex. 16A; the TFT and THBI
signals reach "and" gate A7; if both are
present, they energize the "or" gate 03,
which in turn energizes the flip-flop ERAF,
which in turn energizes the "or" gate 04,
which in turn energizes the flip-flop REJF

A103

and the delay unit D4, from which the
REJA signal emanates.) The REJA signal
results in unlatching the latched trans-
action-selection key in TIM N_ and the
ERA signal will make the “message regis-
ter" MRA ineffective.

If no such error is detected, a THBI'
signal is fed to the "set to 0" input of
flip-flop TFTF and to the “set to 1" in-
put of flip-flop TFSF, which generates
the TFS signal (test-for-scratch) to test
for the selection of an entry upon which
no transaction will be accepted, that is,
a "scratch." The signal representing the
entry stored in the entry register l1HRA
(Annex C, lower half) is fed as one of
the 1HRN signals to the test for non-
allowed transaction unit TFSA (Annex C)
and compared withthe non-transaction
("Scratch") signal SKRN from console C.
The TFS signal from control KA probes the
TFSA unit (a conventional equality com-
parator) for equality between the 1HRN
and SKRN signals and, if it exists, causes
the return of an SKRI signal to control
KA, which generates a REJA signal. It
also causes the generation of a STEP sig-
nal fed to scan counter SKA, for stepping
the scan to the next TIM.

If no non-allowed transaction is de-
tected, the next error processing step is
performed. An SKRI' signal is fed to one
input of "and" unit A4 (Fig. 3), the out-
put of which is fed to the "set to 0" in-
put of flip-flop TFSF and the "set to 1"
input to flip-flop RSCF which generates
the RSCNA' signal; this starts the false
entry test which insures that the signal
on one of the lines HI1A to HNA truly re-
sulted from the depressing of an entry
key. The signal RSCNA’ (meaning that the
entry is real, not false) is fed from the

Al04

transaction processor MRA to all the inter-
faces (see Annex D). [The specification
clearly, and twice, says that signal
RSCNA' (the negation or inversion of RSCNA)
is fed from MRA to IFl to IFN. However,
Figure 3 shows the "1" output of RSCF as
RSCNA and the "0" output as RSCNA', and
Figure 1A as corrected pursuant to cor-
rection request allowed October 27, 1965
(Ex. 2, p. 105) shows the signals from

MRA and MRB to IFl and IFN corrected from
the negative to the positive signals

RSCNA and RSCNB. Figure 4, however, shows
the negation signal ("no false bet")
reaching the interfaces IFl to IFN (at

A8 and A9) to generate, with SCNA and the
"A" master signal, via "or" gate 05 and
"and" gate Al0O the SCNN signal to TIM N.
The inference is that the drawing Fig. 1A
should not have been corrected. The text,
reading it as saying RSCNA', must be
taken to mean that RSCF generates RSCNA'
later, from the input to its "0" side,
from possibly, CONF via "or" unit 02.]
However, since the scan is at TIM N (the
SCNNA signal), it passes through the inter-
face IFN, where is terminates the genera-
tion of the SCNN signal (see Annex D).

It will be recalled that the SCNN signal
was the interrogating signal was which
passed through the latched transaction-
selection switch causing transmission of
signals through buffers 1A to NA to in-
dicate which horse ("entry") a transaction
was being made upon. Therefore, none of
the lines H1A to HNA should carry a sig-
nal when the SCNN signal is absent. After
a delay [at Dl, Fig.3] to permit the
passage of signals through the loop in-
cluding TIM N, the RSCNA signal (meaning

a false bet indication is present in sig-
nal form) is fed to the transaction-made
unit BMA (Annex C lower half). At this
time, if no signals are generated on the

A105

lines H1A to HNA, a BMD signal is not
generated. If, however, the BMD signal,
indicating one of the H1A to HNA signals
must be present, is generated, control
KA - since this is an error - will re-
ceive this signal, which causes the set-
ting of the error flip-flop ERAF and the
generation of the ERA and REJA signals
in the usual way (See Annex C, upper half
of page, at "and" unit A6, indicated in
dotted lines).

[Note that the BMD signal just des-
cribed as occasioning the ERA signal is
the BMD signal referred to above as being
produced when the TFB signal probed unit
BMA. That BMD is fed, in control KA, to
"and" unit A2 and the output of unit A2
initiates the set of tests of the BMD
Signal itself for errors.]

When the transaction processor MRA
completes a test routine, it generates
a signal indicating this fact. For
example, after tests are made for "test
for bet made," for "test for two-entry
transaction" and for “test for non-allowed
transaction," concurrent with the "test
for a false-entry transaction," the "test-
finished" signal TFA is generated by con-
trol KA (Fig. 3, Fig. 2, line from KA to
SYNA; in Fig. 3 at bottom right the PROA
Signal to A5 of KA is generated by the
coincidence of TFA and TFB signals in
SYNA in dual operation).

If an error occurs in the transaction
processor MRA, it will be rendered in-
effective, it will not generate succeed-
ing test or step-finished signals, but,
Since it generates an error signal, this
signal replaces the test-finished signal
(TFA, supra). For example, if transaction
processor MRA detected an error, it would

A106

eR ree Oe ERNE ACT SS Ne I Se reer oe pee a

“shut down" and generate the ERA signal,
as above. The ERA signal would then re-
place the TFA signal, the test finished
signal, generated by control KA.

After all these error tests have been
completed, a GERF flip-flop is set (Fig.
3, lower right). In particular, the
coincidence of the BMD' signal (indicating
that there has been no false entry) and
the RSCNA signal from the "1" out of
flip-flop RSCF, delayed [at Dl[, as inputs
to “and" unit A5 set the GERF flip-flop
to "1"; the "1" output of the flip-flop
GERF (passing via "and" unit A4l and not
via “and" unit A40 since the daily double
is not involved) becomes the GERA signal
(Fig.3).

The GERA signal "strobes" the storage
address generator SAGA (Annex C, lower
half, dotted line). The storage address
generator SAGA is a plurality of "and"
units each having one of its inputs
connected to the GERA signal line and .
other inputs connected to various combi-
nations of the 1HR1 to 1HRN and DKN signal
lines from decoder DEC (Annex C, lower

half).

The storage address register SAGA, in
response to the GERA signal, transmits
tow groups of signals. The first group
AADRAl1 to AADRAM is assocaited with entry
transactions; the second group, AADRAM+1
to AADRAN, is associated with the TIMs.
These signals are grouped into a cable
generalized as an AADRA signal (Annex C,
lower half).

The control KA generates the "send
address" signals SADD (Fig.2,3). The
SADD signal is received by the aggregator
address transmitter AATA and TIM address

A107

transmitter WATA (Fig. 2). The first

and second groups of the storage address
Signals AADRA pass through the aggre-
gator address transmitter AATA to become
the aggregator AADR signals; likewise,
the second group of AADRA signals passes
through the TIM address transmitter

WATA to become the memory position address
WADR signals (Fig.2). Since single wagers,
and not daily double wagers, are here
considered, only the 1HR1 to 1HRN signals
and the DKN signals (from the entry re-
gister 1HRA and the decoder DEC) will be
included in the AADRA signals. In the
Simplex mode, with transaction calculator
TCA operating, the AADR signal (from the
aggregator address transmitter AATA) is
fed to the registers MEMA. Registers
MEMA include a multiplane magnetic core
matrix which is divided into rows and
columns wherein the core in each plane is
the same row and column provides a bit
storage for a multibit binary number. A
group of the registers (aggregator regis-
ters) is.reserved for aggregating trans-
actions. Other registers are reserved
for storing operation and result informa-
tion of the computer COMA. Included with
the registers are typical row and column
"selectors" as well as "read" and "write"
amplifiers. Each row of matrix associated
with the aggregator registers may be

assigned to a different entry (i.e., horse),

and each column, to a different TIM (see
Col. 13, 11 1-14). The addressing cir-
cuitry in register MEMA receives the
aggregator addresss signals AADR to select
the indicated aggregator register. The
contents of that selected aggregator
address are "read" out, re-circulated, and
"written" back into the same selected
aggregator register to update the number
of wagering transactions. In particular -

A108

for example - the AADR signals when re-
ceived by the aggregator registers of
registers MEMA select the column asso-
ciated with the TIM and the row associated
with the particular entry (i.e., horse)
upon which a wager is being made. The
signals representing the accumulated num-
ber of transactions in that aggregator
register are "read" out via the MOA (i.e.,
memory output) signal lines to the up-
dated by one, and are then fed back via
the MIA (i.e., memory input) lines to the
original register in registers MEMA. At
this time, registers MEMA feed an acknowl-
edgment signal, ACKA, via amplifier AKA,
to the control KA, indicating that the
transaction has been recorded.

As what has just been related implies,
the AADR signal lines are a plurality of
lines, divided into two groups. The
first group is made up of lines associated
with the outputs indicative of wagers made
on particular entries (horses), and the
lines are coupled respectively to rows in
the registers MEMA. The second group is
made up of a plurality of lines associated
with the TIMs being processed. Under
control of a "read" signal the "bits" of
the number will be read out of the selec-
ted aggregated register as signals on the
sense windings connected to the MOA sig-
nal lines, passed through a means for up-
dating (e.g., updater UAA) and returned
to the same selected aggregator register
under control of a "write" signal (such
recirculation type magnetic matrices are
well known.) (Col. 13, 11.14-22, 27-33.)

The ACKA signal, fed from registers
MEMA via amplifier AKA, passes through
"or" unit 045 in the control KA (Annex C,
upper half) to set the CONF flip-flop to

A109

the "1" state. The "1" output of the CONF
flip-flop passes through "or" unit 02 to
the "set to 0" input of the RSCF flip-
flop, which, again generates the RSCNA'
signal, which is fed to the interface IFN
to regenerate the SCNN signal (see Annex
D). Although the SCNN signal causes an
entry to be accepted by entry register
1HRA as described above pp. 92-93, since
this is the same entry as before, it makes
no difference. The "1" output of the CONF
flip-flop also passes through the delay
unit D3 to become the CONA signal. The
CONA signal is fed to interface IFN, and
there, via "and" unit A900, "or" unit 090
and “and" unit A6l, to the "set to 1" in-
put of the CONAF flip-flop (Annex D).

The CON signal is then taken directly from
the "1" output of the CONA flip-flop in
interface IFN, as shown in Annex D. (The
"and" unit A80 and delay unit D7 relate

to daily double betting; they do not func-
ion regular betting.) The CON signal is
fed to the TIM under scan, TIM N, causing
the unlatching of the depressed switch

and the issuing of the ticket receipt.

The CONA signal also passes through
"or" unit 01, (Annex C, upper half) to
trigger the step pulse generator STP
(which is a conventional delay multivibra-
tor) to generate the STEP signal which,
accordingly, occurs after the CONA signal.
Therefore, the scan counter SKA is incre-
mented by one so that the next TIM may be
interrogated. When the scan steps off
TIM N, the BIDN signal terminates, causing
the generation of the BIDN' signal which
is connected to the “set to 0" inputs of
the flip-flops CONAF and REJAF (Annex D).

The step signal STEP clears the entry
register 1HRA (Annex C, lower half) as

A110

well as setting the TFBF flip-flop to its

"1" state, and the three flip-flops CONF,

and REJF, and GERF to their "0" states :
(Annex C, upper half and Fig. 3).

While the entry transaction is being
aggregated (see discussion of MEMA regis-
ters, pp. 101-102 above) the specific TIM
transaction is also aggregated. In parti-
cular, the WADR signal is fed to TIM mem-
ory WM. The TIM memory WM is a multiplane
magnetic core matrix and assocaited units
Similar to the registers MEMA, except that
its matrix may be considered as having a
Single row. Of course, it can have many
rows, each associated with different en-
tries. The specific addressed memory
position in the TIM memory WM is selected
in the manner described above for the
registers MEMA; the contents of that
addressed memory position are "read" out
on the WO signal lines and fed via the
updater UAW and the WI signal lines back
to the same addressed memory position in
the TIM memory WM. In this way, a central
check is maintained on the number of trans-
actions made at each TIM.

The transaction processor MRA continues
in this manner to interrogate sequentially
each TIM and to process any wagering
transactions that are made. Finally, the
scan counter SKA reaches a count that is
one greater than the number of TIMs. There-
fore, no TIM is interrogated on this step.
Instead, the reliability of the buffers 1A

to NA is tested for short circuit conditions:
which would effectively prevent transactions

on certain entries during certain periods
of time. For example, if an element in

buffer NA associated with the line HNN is
short-circuited, and the entry number N key
of TIM N is depressed while the scanner SCA
is pointing to another of the TIMs, then

Alll

that other TIM will be unable to complete
a transaction on entry N.

The test is performed by transmitting
the CHKA signal, derived from the SCNZA
Signal generated by scanner SCA, to each
of the buffers, NA. For simplicity,

CHKA = SCNZA.

The buffers 1A to NA should transmit a
Simulated transaction on each entry:
that is, signals should be present in
all of the lines H1A to HNA. Those
lines are all fed to the end-scan test
ESTA (Fig.2) and a multicoincidence is
tested for by the SCNZA signal. If the
multicoincidence is not obtained, an ESR
Signal is fed to the control KA (Annex
C, upper half, dotted line to 03), caus-
ing the generation of the ERA error sig-
nal (Annex C). That signal is derived
from the flip-flop ERAF at its "1" output,
as seen in Annex C.

During all the time until the race
commences, the computer COMA periodically
performs calculations on the aggregated
transactions in order to establish inter-
im accounting results such as odds (Annex
B, dotted lines). The computer has access
to the aggregator registers which supply
the "operands." Error checking is per-
formed during these calculations. If an
error is detected by the transaction cal-
culator TCA (Annex B), it generates an
error signal. The transaction calculator
will become ineffective and cause error
unit ERCA to generate a CERA signal. The
disposit

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Source: Frix Law Library, https://www.frixlaw.com/law-library/documents/brief%3Amicro_IA40385004_2314%3A2. Public record. Not legal advice.